EP2A40F672C9N vs EP2A40F672C6N Comparaison
Comparaison détaillée côte à côte de EP2A40F672C9N par Intel et EP2A40F672C6N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2A40F672C9N | EP2A40F672C6N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $295,00 | $165,00 |
| Family | APEX II | APEX II |
| Device Name | EP2A40 | — |
| System Gates | 1,500,000 | — |
| Logic Elements | 38,400 | 40,000 |
| User I/Os | 492 | — |
| Embedded RAM (ESB) | [DATA_NEEDED: ESB total RAM bits] | — |
| Boîtier | BGA-672 (27 x 27 mm, 1.0 mm pitch) | 672-ball FineLine BGA |
| Package Code | FC-FBGA / PBGA672 | — |
| Speed Grade | C9 (~1.55 ns propagation delay) | C6 (per part number suffix) |
| Process Technology | 0.15 µm all-layer copper, up to 8 metal layers | SRAM-based, 0.18 um (per family datasheet) |
| Core Voltage | 1.5 V | 1.5 V |
| Internal Frequency | 366 MHz | — |
| LVDS Data Rate | 1 Gbps | — |
| Propagation Delay | 1.55 ns | — |
| Température de fonctionnement | 0 °C to +85 °C (commercial) | Commercial (0C to +85C) |
| Type de montage | Surface Mount | Surface Mount |
| Logic Family | CMOS (SRAM-based configuration) | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS compliance status] |
| Maximum System Gates | — | 1,125,000 |
| Embedded RAM Bits | — | 442,368 |
| Embedded System Blocks (ESBs) | — | 160 |
| Maximum User I/O Pins | — | [DATA_NEEDED: maximum user I/O count] |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, GTL+, SSTL, HSTL, 1.8V/2.5V/3.3V/5V |
| Configuration Methods | — | Passive Serial, Passive Parallel, JTAG |
| PLL Count | — | [DATA_NEEDED: PLL count] |