EP2A70B724I-9 vs EP2A70B724I9 Comparaison
Comparaison détaillée côte à côte de EP2A70B724I-9 par Altera et EP2A70B724I9 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EP2A70B724I-9 - APEX II FPGA 70K LE, BGA-724, -9 Speed | Altera / Intel
EP2A70B724I-9 ObsoleteComparaison des spécifications
| Paramètre | EP2A70B724I-9 | EP2A70B724I9 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $925,00 | $160,00 |
| Family | APEX II | APEX II |
| Logic Elements (typical) | 70,000 | — |
| Embedded RAM (ESB bits) | 4,290 Kbit | — |
| Maximum User I/O | [DATA_NEEDED: max user I/O count] | — |
| Boîtier | BGA-724 | 724-pin FCBGA (Flip-Chip BGA) |
| Speed Grade | -9 | — |
| Température de fonctionnement | -40C to +100C (industrial, 'I' suffix) | — |
| Process Node | [DATA_NEEDED: process node] | — |
| Supply Voltage Core | 1.5 V (typical) | — |
| Supply Voltage I/O | 3.3 V (typical, multi-voltage I/O banks supported) | — |
| Configuration Method | Passive Serial, Passive Parallel, EPC4/EPC8/EPC16 enhanced configuration devices | — |
| Peak Reflow Temperature | 220 C | — |
| Type de montage | Surface Mount (BGA) | Surface Mount |
| Niveau MSL | [DATA_NEEDED: MSL rating] | — |
| Statut RoHS | unknown | [DATA_NEEDED: RoHS compliance status] |
| Logic Elements | — | 67,200 |
| System Gates | — | Approximately 3,000,000 |
| Embedded Memory | — | 540 Kbits (1,146,880 bits total ESB memory per Jotrin listing) |
| Process Technology | — | 0.15 µm CMOS |
| Core Voltage | — | 1.5 V |
| Maximum Operating Frequency | — | 198 MHz |
| Number of PLLs | — | 4 |
| Embedded System Blocks (ESBs) | — | 4 |
| Operating Temperature Grade | — | Industrial (-40C to +100C) |
| I/O Standards Supported | — | LVTTL, LVCMOS, SSTL, HSTL, LVDS |
| Configuration Mode | — | SRAM-based, configurable via JTAG or EPC enhanced configuration devices |