EP2A70B724I7N vs EP2A70B724I-8 Comparaison
Comparaison détaillée côte à côte de EP2A70B724I7N par Intel et EP2A70B724I-8 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2A70B724I7N | EP2A70B724I-8 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $218,00 | $119,00 |
| Family | APEX II | APEX II |
| Logic Elements | 67,200 cells | — |
| System Gates | 3,000,000 | 3,000,000 |
| Maximum Operating Frequency | 420 MHz | — |
| Process Technology | 0.15 um CMOS | 0.15 µm CMOS |
| Core Supply Voltage (VCCINT) | 1.5 V | — |
| Boîtier | 724-pin FCBGA | — |
| User I/O Pins | 536 | [DATA_NEEDED: user I/O pin count] |
| Propagation Delay | 2.17 ns | — |
| Operating Temperature Grade | Industrial (-40C to +100C, suffix I) | — |
| Configuration Modes | Passive Serial, Passive Parallel, JTAG | — |
| Embedded Memory | [DATA_NEEDED: ESB memory size] | — |
| I/O Standards Supported | LVDS, PCI-X, HSTL, SSTL, LVTTL, LVCMOS | — |
| Type de montage | Surface Mount (BGA) | Surface Mount |
| Statut RoHS | unknown | [DATA_NEEDED: RoHS compliance] |
| Logic Elements / Cells | — | 67,200 cells |
| Maximum Internal Frequency | — | 281 MHz |
| Core Supply Voltage | — | 1.5 V |
| I/O Supply Voltage | — | 3.3 V |
| Nombre de broches | — | 724 |
| Package Type | — | FCBGA (Flip-Chip Ball Grid Array) |
| Température de fonctionnement | — | -40 °C to +100 °C (Industrial) |
| Peak Reflow Temperature | — | 220 °C (per JEDEC J-STD-020) |
| User I/O Banks | — | [DATA_NEEDED: user I/O bank count] |
| Embedded System Blocks (ESBs) | — | [DATA_NEEDED: ESB count] |
| Embedded Array Blocks (EABs) | — | [DATA_NEEDED: EAB count] |
| Embedded RAM | — | [DATA_NEEDED: total bits] |
| PLLs | — | [DATA_NEEDED: PLL count] |
| Configuration Method | — | JTAG / Passive Serial / Passive Parallel |
| Niveau MSL | — | [DATA_NEEDED: MSL level] |