EP2A70F1736C8 vs EP2A70F1736C9 Comparaison
Comparaison détaillée côte à côte de EP2A70F1736C8 par Intel et EP2A70F1736C9 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2A70F1736C8 | EP2A70F1736C9 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $105,00 | $175,00 |
| Series | APEX II | — |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements (LEs) | 67,200 | — |
| Total RAM Bits | 1,146,880 | — |
| Core Supply Voltage | 1.425 V to 1.575 V (1.5 V nominal) | — |
| Température de fonctionnement | 0°C to 85°C (TJ, commercial) | 0C to +85C (Commercial) |
| Boîtier / Format | 1736-ball FC-BGA | — |
| Supplier Device Package | 1736-pin FC-BGA | — |
| Type de montage | Surface Mount | Surface Mount (BGA) |
| Process Technology | 0.18 µm CMOS | 0.18 um CMOS |
| Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | — |
| Embedded System Blocks (ESBs) | [DATA_NEEDED: ESB count] | Yes (dual-port RAM/FIFO/CAM capable) |
| User I/O Banks | [DATA_NEEDED: I/O bank count] | — |
| Maximum User I/O | [DATA_NEEDED: maximum user I/O count] | — |
| MultiCore Interconnect | Yes (per APEX II family datasheet) | — |
| PLL Count | [DATA_NEEDED: PLL count] | 4 |
| Configuration Scheme | PS / JTAG / PPA | — |
| Lead Free | Per manufacturer datasheet | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance status] |
| Niveau de sensibilité à l'humidité (MSL) | Per JEDEC J-STD-020 (package-dependent) | — |
| Family | — | APEX II |
| Typical Gates | — | 70,000 |
| Logic Elements | — | 53,376 (approx) |
| Boîtier | — | 1736-ball FineLine BGA |
| Core Voltage | — | 1.5 V |
| I/O Voltage Support | — | 1.8 V / 2.5 V / 3.3 V / 5 V (MultiVolt) |
| Maximum User I/O Pins | — | 1072 |
| Programming Interface | — | JTAG (IEEE 1149.1) + in-system |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |