EP2AGX190FF35I5N vs EP2AGX190FF35I3G Comparaison
Comparaison détaillée côte à côte de EP2AGX190FF35I5N par Intel et EP2AGX190FF35I3G par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EP2AGX190FF35I3G - Arria II GX FPGA 190K LE | Intel | Altera
EP2AGX190FF35I3G ⚠ Dernier achatComparaison des spécifications
| Paramètre | EP2AGX190FF35I5N | EP2AGX190FF35I3G |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $1 605,00 | $1 840,00 |
| Device Family | Arria II GX | — |
| Logic Elements | 181165 | — |
| Adaptive Logic Modules (ALMs) | 7612 | — |
| User I/Os | 612 | — |
| Embedded Memory (Kbits) | 10177.536 | — |
| Number of Transceivers | Up to 16 | — |
| Transceiver Data Rate | Up to 3.75 Gbps | — |
| Core Supply Voltage | 0.9 V | — |
| Process Technology | 40 nm | — |
| Package Type | 1152-ball FC-FBGA (FF35) | — |
| Température de fonctionnement | -40C to +100C (Industrial) | -40 °C to +100 °C (industrial, suffix I) |
| Pin/Pitch Configuration | [DATA_NEEDED: ball pitch and pin map] | — |
| Hard Memory Controllers | Yes | — |
| Hard PCI Express Blocks | Yes (Gen1) | — |
| Embedded Multipliers (18x18) | [DATA_NEEDED: count] | — |
| PLLs | Up to 8 | [DATA_NEEDED: PLL count] |
| Statut RoHS | Compliant | Compliant (suffix G) |
| Family | — | Arria II GX |
| Logic Elements (LE) | — | 181,165 |
| Adaptive Logic Modules (ALM) | — | [DATA_NEEDED: ALM count] |
| User I/O Pins | — | 612 |
| Embedded Memory (bits) | — | 10,177,536 |
| Number of I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Transceivers | — | 8 high-speed transceiver channels (multi-gigabit) |
| Embedded Multipliers | — | [DATA_NEEDED: 18x18 multiplier count] |
| Core Voltage | — | 0.9 V |
| I/O Voltage Standards | — | 1.2 V to 3.3 V (LVTTL, LVCMOS, LVDS, HSTL, SSTL) |
| Process Node | — | 40 nm |
| Speed Grade | — | 3 |
| Boîtier | — | 1152-ball FC-FBGA (FF35), 35 mm body |
| Ball Pitch | — | [DATA_NEEDED: 1.0 mm (typical for FF35)] |
| Type de montage | — | Surface Mount (flip-chip BGA) |
| Lead-Free | — | Yes |
| Programming Toolchain | — | Quartus II / Quartus Prime |