EP2AGX45CU17I3G vs EP2AGX45DF25I3G Comparaison
Comparaison détaillée côte à côte de EP2AGX45CU17I3G par Intel et EP2AGX45DF25I3G par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2AGX45CU17I3G | EP2AGX45DF25I3G |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $445,00 | $370,00 |
| Family | Arria II GX | Arria II GX |
| Logic Elements | 42,959 | — |
| Logic Array Blocks (LABs) | 1,805 | — |
| Total RAM Bits | 3,517,440 | — |
| User I/O Pins | 156 | — |
| Number of I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Transceivers | Up to 8 channels | — |
| Transceiver Data Rate | Up to 3.125 Gbps | — |
| Process Technology | 40 nm | — |
| Core Voltage (Vcc) | 1.0 V (0.9 V internal) | — |
| PLLs | 4 | — |
| DSP Blocks | Yes (variable-precision DSP) | — |
| Température de fonctionnement | -40C to +100C (Industrial) | — |
| Boîtier | 358-ball UBGA (FCBGA), 17x17 mm | 572-ball FCBGA (HBGA) |
| Ball Pitch | 1.0 mm | — |
| Type de montage | Surface Mount (BGA) | Surface Mount (BGA) |
| Niveau MSL | 3 (168 hours) | 3 |
| Statut RoHS | Compliant | Compliant |
| Logic Elements (LE) | — | 42,959 |
| Adaptive Logic Modules (ALM) | — | 17,715 |
| Embedded Memory Bits | — | 3,517,440 bits |
| Embedded Memory M9K Blocks | — | [DATA_NEEDED: M9K block count] |
| DSP Blocks (18x18 multipliers) | — | [DATA_NEEDED: DSP block count] |
| Maximum User I/O Pins | — | 252 |
| Transceiver Channels | — | [DATA_NEEDED: MGT channel count] |
| Maximum Transceiver Data Rate | — | 6.375 Gbps |
| Package Dimensions | — | 25 mm x 25 mm |
| Plage de température de fonctionnement | — | -40C to +100C (Industrial) |
| Speed Grade | — | I3 |
| Process Node | — | 40 nm |
| Supply Voltage (Core) | — | [DATA_NEEDED: VCCINT] |
| Hard IP for PCIe | — | PCIe Gen1/Gen2 endpoints and root ports |
| Lead-Free | — | Yes |