EP2C8T144C6N vs EP2C8T144C6 Comparaison
Comparaison détaillée côte à côte de EP2C8T144C6N par Intel et EP2C8T144C6 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2C8T144C6N | EP2C8T144C6 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $14,20 | $22,62 |
| Family | Cyclone II | Cyclone II |
| Logic Elements | 8,256 | — |
| Total RAM Bits | 165,888 | — |
| Number of LABs/CLBs | [DATA_NEEDED: LAB count] | — |
| Number of Logic Elements / Cells | 8,256 | — |
| Total Memory Bits | 165,888 | — |
| Number of I/O | 85 | — |
| Number of Multipliers (18x18) | [DATA_NEEDED: 18x18 multiplier count] | — |
| Number of PLLs | [DATA_NEEDED: PLL count] | — |
| Voltage - Supply | 1.15 V to 1.25 V (core) | — |
| Température de fonctionnement | 0C to +85C (commercial) | — |
| Boîtier / Format | 144-LQFP (TQFP) | — |
| Supplier Device Package | 144-TQFP (20x20 mm) | — |
| Type de montage | Surface Mount | Surface Mount |
| Process Technology | 90 nm CMOS SRAM | 90 nm CMOS |
| Configuration Method | SRAM - volatile (EPCS/JTAG required) | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance status] | Non-compliant (per distributor listing) |
| Niveau MSL | [DATA_NEEDED: MSL rating] | — |
| Logic Elements (LE) | — | 8,256 |
| Configurable Logic Blocks (CLB) | — | 516 |
| Embedded Memory (bits) | — | 165,888 |
| Embedded RAM Blocks | — | 36 M4K blocks (4,608 bits each) |
| Embedded 18x18 Multipliers | — | 18 |
| PLLs | — | 4 |
| User I/O Pins (max) | — | 85 |
| Maximum User I/O (this package) | — | 85 |
| Core Voltage | — | 1.2 V (typical) |
| Speed Grade | — | 6 |
| Plage de température de fonctionnement | — | Commercial (0C to +85C) |
| Boîtier | — | 144-pin LQFP (TQFP), 22x22 mm, 0.5 mm pitch |
| Configuration Interface | — | JTAG (IEEE 1149.1), Altera AS / PS / PP |
| Design Software | — | Quartus II (v13.0 SP1 recommended) |
| Maximum Internal Frequency | — | [DATA_NEEDED: see Cyclone II device handbook for fMAX by design] |