EP2S15F672C4 vs EP2C50F672C8N Comparaison
Comparaison détaillée côte à côte de EP2S15F672C4 par Altera et EP2C50F672C8N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP2C50F672C8N - Cyclone II FPGA, 50K LE, 672-BGA | Intel / Altera
EP2C50F672C8N ⚠ Dernier achatComparaison des spécifications
| Paramètre | EP2S15F672C4 | EP2C50F672C8N |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $235,00 | $148,75 |
| Family | Stratix II | — |
| Logic Elements | 15,600 | — |
| Embedded Memory Bits | 419,328 bits | — |
| DSP Blocks | 156 (approximate, per Stratix II family) | — |
| Maximum User I/Os | 366 | — |
| Boîtier | 672-ball FineLine BGA (FBGA) | 672-FBGA (FineLine BGA) |
| Process Node | 90 nm | — |
| PLLs | 6 | — |
| Température de fonctionnement | Commercial (0C to +85C, 'C' suffix) | 0C to +85C (commercial) |
| Speed Grade | 4 | C8 |
| Configuration Method | Serial / Parallel (passive serial, fast passive parallel, JTAG) | — |
| I/O Standards Supported | LVTTL, LVCMOS, LVDS, SSTL, HSTL (per Stratix II family) | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance per Altera product page] | [DATA_NEEDED: rohs status from datasheet] |
| Lead-Free | [DATA_NEEDED: lead-free finish status] | — |
| Niveau MSL | [DATA_NEEDED: MSL moisture sensitivity level] | — |
| Series | — | Cyclone II |
| Number of Logic Elements | — | 50,528 |
| Number of Logic Array Blocks (LABs) | — | 4,608 |
| Total RAM Bits | — | 594,432 |
| Number of I/O | — | 450 |
| Number of User I/O Banks | — | 8 (per family architecture) |
| Number of PLLs | — | 4 |
| Number of DLLs | — | 2 |
| Embedded 18x18 Multipliers | — | 86 |
| Core Voltage | — | 1.2 V |
| Package Body Size | — | 27 mm x 27 mm |
| Type de montage | — | Surface Mount |
| Process Technology | — | 90 nm low-k CMOS |
| Configuration | — | JTAG + serial/parallel |