EP2S30F484C4 vs EP2S60F484C4N Comparaison
Comparaison détaillée côte à côte de EP2S30F484C4 par Altera et EP2S60F484C4N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2S30F484C4 | EP2S60F484C4N |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $124,00 | $920,00 |
| Family | Stratix II | Stratix II FPGA |
| Logic Elements | 33,880 | — |
| Logic Array Blocks (LABs) | 1694 | — |
| CLBs | 13552 | — |
| Total RAM Bits | 1,369,728 | — |
| User I/Os | 342 | — |
| Core Voltage (VCCINT) | 1.2 V | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Maximum Operating Frequency | 711.24 MHz | — |
| Boîtier | 484-pin FC-FBGA (1.0 mm pitch) | 484-Ball FBGA (FineLine BGA) |
| Package Dimensions | 23 x 23 mm | — |
| Type de montage | Surface Mount | Surface Mount |
| Température de fonctionnement | 0 °C to +85 °C (Commercial) | — |
| Temperature Grade | C4 (Commercial) | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS Status] |
| Configuration Interface | JTAG / Passive Serial / Fast Passive Parallel | — |
| Series | — | Stratix II |
| Logic Elements (LE) | — | 60,440 |
| Adaptive Logic Modules (ALM) | — | 30,220 |
| Embedded Memory (Bits) | — | 2,544,192 |
| DSP Blocks (18x18 Multipliers) | — | 36 |
| Maximum User I/O | — | 334 |
| User I/O Banks | — | [DATA_NEEDED: User I/O Banks] |
| PLLs | — | Up to 12 |
| Core Supply Voltage | — | 1.2 V |
| Maximum Internal Clock Frequency | — | 711.24 MHz |
| Operating Temperature Grade | — | Commercial (C4) |
| Configuration Modes | — | Passive Serial, Fast Passive Parallel, JTAG |
| Lead-Free | — | [DATA_NEEDED: Lead-Free] |