EP2S60F484C3N vs EP2S60F484C4N Comparaison
Comparaison détaillée côte à côte de EP2S60F484C3N par Intel et EP2S60F484C4N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2S60F484C3N | EP2S60F484C4N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $1 245,75 | $920,00 |
| Family | Stratix II | Stratix II FPGA |
| Logic Elements | 60,440 | — |
| Adaptive LUTs (ALUTs) | 48,352 | — |
| Embedded Memory (TriMatrix) | 2,544 Kbits (M4K + M512 + M-RAM) | — |
| Embedded DSP Blocks | 12 (48 GMACs at 450 MHz) | — |
| Maximum User I/O Pins | 334 | — |
| Boîtier | 484-BGA (F484), 1.0 mm pitch | 484-Ball FBGA (FineLine BGA) |
| Process Technology | 90 nm CMOS, 1.2 V core | 90 nm CMOS |
| Speed Grade | -3 (fastest commercial) | — |
| Operating Temperature (Commercial) | 0C to +85C (TJ) | — |
| Supply Voltage VCCINT | 1.2 V nominal | — |
| Configuration Modes | FPP, AS, PS, JTAG | Passive Serial, Fast Passive Parallel, JTAG |
| Niveau MSL | 3 (per JEDEC J-STD-020) | — |
| Statut RoHS | Compliant | [DATA_NEEDED: RoHS Status] |
| Lead-Free | Yes | [DATA_NEEDED: Lead-Free] |
| Series | — | Stratix II |
| Logic Elements (LE) | — | 60,440 |
| Adaptive Logic Modules (ALM) | — | 30,220 |
| Embedded Memory (Bits) | — | 2,544,192 |
| DSP Blocks (18x18 Multipliers) | — | 36 |
| Maximum User I/O | — | 334 |
| User I/O Banks | — | [DATA_NEEDED: User I/O Banks] |
| PLLs | — | Up to 12 |
| Core Supply Voltage | — | 1.2 V |
| Maximum Internal Clock Frequency | — | 711.24 MHz |
| Type de montage | — | Surface Mount |
| Operating Temperature Grade | — | Commercial (C4) |