EP2SGX60EF1152I4N vs EP2SGX60EF1152I3 Comparaison
Comparaison détaillée côte à côte de EP2SGX60EF1152I4N par Intel et EP2SGX60EF1152I3 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP2SGX60EF1152I3 - 60K LEs Stratix II GX FPGA, 1152-BGA, Industrial | Intel
EP2SGX60EF1152I3 ObsoleteComparaison des spécifications
| Paramètre | EP2SGX60EF1152I4N | EP2SGX60EF1152I3 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,00 | $365,00 |
| Device Type | FPGA | — |
| Product Family | Stratix II GX | — |
| Logic Cells | 60,440 | — |
| Embedded Memory | 2,544,192 bits | — |
| I/O Count | 534 | — |
| Internal Frequency | 717 MHz | — |
| Tension d'alimentation | 1.2 V | — |
| Boîtier | 1,152-ball FBGA | 1152-ball FBGA, 35 mm x 35 mm, 1 mm pitch |
| Package Type | Other, 23 x 23 mm, 1 mm pitch, MS-034AAJ-1, FBGA-484 | — |
| Pins | 484 | — |
| Device Technology | 90 nm | — |
| Logic Blocks | 3,022 LABs | — |
| Type de montage | Surface mount | Surface Mount (BGA) |
| Operating Temperature Grade | Industrial | — |
| Compliance | [DATA_NEEDED: compliance certification details] | — |
| Transceiver Count | [DATA_NEEDED: high-speed transceiver count] | — |
| Configuration Memory | [DATA_NEEDED: configuration memory specification] | — |
| Package Pinout | [DATA_NEEDED: complete ball-map pinout] | — |
| Family | — | Stratix II GX |
| Series | — | EP2SGX60 |
| Logic Elements (LEs) | — | 60,440 |
| Adaptive Logic Modules (ALMs) | — | 30,220 (estimated from LEs) |
| Equivalent Logic Cells (CLBs) | — | 60,440 |
| Embedded Memory (Bits) | — | 2,544,192 bits (per DigiKey listing for the I4N variant) |
| Maximum Internal Frequency | — | 717 MHz |
| Combinational Delay (per CLB) | — | 2.99 ns |
| Multi-Gigabit Transceivers | — | [DATA_NEEDED: exact count for EP2SGX60] |
| Maximum Transceiver Data Rate | — | 6.375 Gbps (per Stratix II GX family spec) |
| Total RAM Bits | — | 2,544,192 bits |
| Pin/Ball Count | — | 1152 |
| Température de fonctionnement | — | -40C to +100C (Industrial, I3 speed grade) |
| Speed Grade | — | I3 (Industrial) |
| Configuration Mode | — | Enhanced (EPC) - fast parallel via external memory |
| Process Technology | — | 90 nm CMOS |
| Statut RoHS | — | [DATA_NEEDED: not in retrieved snippets] |