EP3SE260F1517C4L vs EP3SE260H780C4LG Comparaison
Comparaison détaillée côte à côte de EP3SE260F1517C4L par Altera et EP3SE260H780C4LG par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP3SE260F1517C4L | EP3SE260H780C4LG |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $15 100,00 | $1 290,00 |
| Family | Stratix III E | Stratix III Enhanced (EP3SE) |
| Logic Elements | 255,000 | 254,400 |
| Embedded Memory Bits | 16,672,768 | — |
| Number of User I/O | 976 | — |
| Boîtier | 1517-BBGA, FCBGA (FineLine BGA) | 780-ball FineLine BGA (HBGA, 29 mm x 29 mm, 1.0 mm pitch) |
| Process Technology | 65 nm | 65 nm TSMC low-power CMOS |
| Core Voltage | 1.1 V | — |
| Maximum Operating Frequency | 450 MHz | — |
| Number of Transceivers | 16 | — |
| Transceiver Data Rate (Max) | 1.25 Gbps | — |
| Multiplier Blocks (18x18) | 384 | — |
| Total TriMatrix Memory | 15.04 Mbits (MLAB + M9K + M144K) | — |
| PLLs | 4 per quadrant + 8 fractional PLLs | — |
| Température de fonctionnement | 0C to +85C (commercial) | — |
| Type de montage | Surface Mount (BGA) | Surface Mount (BGA) |
| Statut RoHS | [DATA_NEEDED: RoHS status] | Compliant (Pb-free HBGA) |
| Adaptive Logic Modules (ALMs) | — | 101,760 |
| Embedded Memory (M9K + M144K) | — | 18.36 Mbits |
| DSP Blocks (18-bit x 18-bit) | — | 768 |
| 18-bit x 18-bit Multipliers | — | 1,536 |
| Transceivers (full-duplex) | — | 8 (up to 6.375 Gbps) |
| Maximum User I/O Pins | — | 488 |
| Speed Grade | — | C4 (commercial, mid-speed tier) |
| Temperature Grade | — | Commercial (0C to +85C junction) |
| Operating Voltage (Core) | — | 0.9 V / 1.0 V / 1.1 V (programmable) |
| External Memory Interface | — | Up to 800 Mbps DDR3, QDR II+, RLDRAM II |
| Hard IP Blocks | — | PCIe Gen2, 10GbE MAC, memory controllers |
| Niveau MSL | — | 3 (per JEDEC J-STD-020) |