EP3SL50F780C2G vs EP3SL50F780C3 Comparaison
Comparaison détaillée côte à côte de EP3SL50F780C2G par Intel et EP3SL50F780C3 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP3SL50F780C3 - Stratix III L FPGA, 47.5K LE, 780-FBGA | Intel / Altera
EP3SL50F780C3 ⚠ Dernier achatComparaison des spécifications
| Paramètre | EP3SL50F780C2G | EP3SL50F780C3 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $264,90 | $540,00 |
| Series | Stratix III L | Stratix III |
| Logic Elements | 47,500 LE | 47,500 |
| Adaptive Logic Modules (ALMs) | 19,000 ALM | — |
| Embedded Memory | 2.08 Mbit | — |
| Total Memory Bits | 2,184,192 bit | — |
| User I/Os | 488 | 488 |
| Operating Supply Voltage (Core) | 1.1 V | — |
| Speed Grade | -2 (C2) | 3 |
| Température de fonctionnement | 0 °C to +85 °C (Commercial) | 0C to +85C (Commercial) |
| Boîtier | 780-ball FCBGA | — |
| Type de montage | Surface Mount | — |
| Statut RoHS | Pb-Free / RoHS Compliant (-G suffix) | Compliant |
| Transceivers | Reduced / Not Featured (L-tier) | — |
| DSP Blocks | 18×18 multipliers (per family datasheet) | — |
| Configuration | JTAG / Passive Serial / Fast Passive Parallel | — |
| Family | — | Stratix III L (low-power) |
| Logic Array Blocks (LABs) | — | 1,900 |
| Embedded Memory Bits | — | 2,184,192 |
| Package Type | — | 780-BBGA, FCBGA (FineLine) |
| Device Pin Count | — | 780 |
| Supply Voltage (Core) | — | [DATA_NEEDED: VCCINT nominal value] |
| PLLs | — | 12 |
| Global Clock Networks | — | 24 |
| Process Node | — | 65 nm TSMC |
| Configuration Method | — | SRAM-based, supports Partial Reconfiguration |
| Lead-Free / Halogen-Free | — | Lead-Free (per package marking); Halogen-Free status unknown |
| Niveau de sensibilité à l'humidité (MSL) | — | MSL3 (per JEDEC J-STD-020, typical for large FBGA) |