EP610DC-35 vs EP610DC-30 Comparaison
Comparaison détaillée côte à côte de EP610DC-35 par Altera et EP610DC-30 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP610DC-35 | EP610DC-30 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $18,40 | $10,40 |
| Device Type | CPLD - Classic EPLD | — |
| Family | Altera Classic EP610 | EP610 (Classic Device Family) |
| Macrocells | 16 | 16 |
| Usable Gates | 300 | 300 |
| Propagation Delay (tPD) | 35 ns | 30 ns |
| Maximum Frequency (fMAX) | 28.6 MHz | — |
| Pipelined Data Rate | up to 100 MHz | — |
| Supply Voltage (VCC) | 5 V | — |
| Process Technology | CMOS | — |
| Program/erase Method | UV-erasable (windowed CERDIP) | — |
| Boîtier | 24-pin CDIP (windowed CERDIP) 0.300 inch | 24-pin CERDIP (windowed) |
| Type de montage | Through-Hole (DIP) | Through-Hole |
| Température de fonctionnement | 0C to +70C (commercial) [DATA_NEEDED: explicit range from datasheet] | Commercial (0C to +70C) |
| Manufacturer | Originally Altera; today supplied via Rochester Electronics (authorized) | — |
| Statut RoHS | [DATA_NEEDED: not explicitly confirmed in retrieved data; CERDIP packages typically non-RoHS] | — |
| Product Type | — | Classic EPLD (Erasable Programmable Logic Device) |
| Logic Expanders | — | 4 (4 product terms per macrocell) |
| Maximum Pipelined Clock Frequency | — | 100 MHz |
| Dedicated Inputs | — | 16 |
| I/O Pins | — | 16 (with output enable) |
| Speed Grade | — | -30 (30 ns tPD) |
| Technology | — | CMOS EPROM |
| Programmability | — | UV-erasable, windowed EPROM |
| Security Bit | — | Yes (protects design after programming) |
| Output Modes | — | Registered and Combinatorial |