EP610DI-30 vs EP610DC-20 Comparaison
Comparaison détaillée côte à côte de EP610DI-30 par Rochester Electronics et EP610DC-20 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Rochester Electronics
EP610DI-30 - 16-Macrocell Classic EPLD, 30ns, CERDIP-24 | Rochester Electronics
EP610DI-30 ✓ Actif
Comparaison des spécifications
| Paramètre | EP610DI-30 | EP610DC-20 |
|---|---|---|
| Marque | Rochester Electronics | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $23,50 | $15,85 |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Family | Classic EP610 | Classic EP610 |
| Macrocells | 16 | — |
| Propagation Delay (tPD) | 30 ns | 22 ns |
| Pipelined Data Rate | 100 MHz | — |
| Technology | CMOS | — |
| Tension d'alimentation | 5 V (single supply) | — |
| Boîtier | CERDIP-24 (windowed, UV-erasable) | 24-pin Ceramic DIP (CDIP-24) with UV window |
| Type de montage | Through-Hole | Through-hole |
| Programmable Elements | EPROM (UV-erasable, windowed) | — |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | 0 °C to 70 °C (commercial) |
| I/O Pins | [DATA_NEEDED: I/O pin count] | 16 (bidirectional) |
| Logic Capacity | [DATA_NEEDED: usable gates / logic capacity] | — |
| Statut RoHS | unknown | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | unknown | [DATA_NEEDED: lead-free status] |
| Original Manufacturer | Altera (now Intel) | — |
| Current Supplier | Rochester Electronics (authorized continuing source) | — |
| Niveau MSL | N/A (through-hole, non-surface-mount) | — |
| Product Type | — | CMOS UV-Erasable Programmable Logic Device (EPLD) |
| Logic Macrocells | — | 16 |
| Dedicated Inputs | — | 4 |
| Total Usable Pins | — | 20 |
| Product Terms (p-terms) | — | 160 |
| Maximum Toggle Frequency (fMAX) | — | 55.6 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (5 V nominal) |
| Programming Method | — | UV erasure + parallel programmer |
| Process Technology | — | CMOS, UV-erasable floating gate |