EP910LC-30Y vs EP910LC30T Comparaison
Comparaison détaillée côte à côte de EP910LC-30Y par Altera et EP910LC30T par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP910LC-30Y | EP910LC30T |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $25,40 | $9,75 |
| Family | Altera Classic EPLD | — |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Macrocells | 24 | 24 |
| Usable Gates | 450 | — |
| Pin-to-Pin Delay (tPD) | 30 ns | — |
| Counter Frequency (fMAX) | 100 MHz (family maximum) | — |
| Tension d'alimentation | 5 V (TTL-compatible) | 5 V |
| Process Technology | CMOS, UV-erasable / OTP | CMOS (LC low-power variant) |
| Boîtier | PLCC-44 | 44-pin PLCC (J-Lead), Tape and Reel |
| Température de fonctionnement | Commercial 0C to +70C | [DATA_NEEDED: operating temperature range] |
| Speed/Power Grade | LC (low-power, 30ns) | — |
| Processing Flow | Y (extended reliability) | — |
| Logic Compatibility | 100% TTL emulation | — |
| Type de montage | Surface Mount (PLCC socket) | Surface Mount |
| Statut RoHS | [DATA_NEEDED: RoHS status not specified in retrieved data] | [DATA_NEEDED: RoHS status] |
| Device Family | — | Altera Classic EPLD |
| Logic Capacity | — | 450 equivalent gates |
| Propagation Delay | — | 30 ns (tpd) |
| Maximum Frequency | — | 33.3 MHz |
| Programmable Elements | — | UV-erasable EPROM |
| Niveau MSL | — | [DATA_NEEDED: MSL level] |
| Programming Interface | — | Altera ByteBlaster-compatible |
| Manufacturer | — | Intel (formerly Altera); currently supplied by Rochester Electronics |