EP910LC-35H vs EP910LI-35H Comparaison
Comparaison détaillée côte à côte de EP910LC-35H par Altera et EP910LI-35H par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP910LC-35H | EP910LI-35H |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $25,00 | $9,85 |
| Family | Classic EPLD (EP910) | Altera Classic EPLD (EP910) |
| Logic Elements | 24 macrocells | — |
| Equivalent Gates | 450 usable gates | — |
| Propagation Delay (tpd) | 35 ns | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | 5 V (±10%) |
| Technology | CMOS, UV-erasable EPROM | CMOS, UV-erasable EPROM cell |
| Boîtier | 40-pin Ceramic DIP (H suffix) | 44-pin PLCC (J-lead) |
| User I/O Pins | 36 | — |
| Dedicated Inputs | 10 | — |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range grade] | -40C to +85C (industrial) |
| Erasure Method | UV (quartz window on H package) | — |
| Programming Method | Altera hardware programmer | — |
| Logic Levels | TTL compatible | — |
| Courant de repos | [DATA_NEEDED: typical ICC value] | — |
| Process Node | [DATA_NEEDED: process geometry] | — |
| Type de montage | Through-hole (Ceramic DIP) | Surface Mount |
| Statut RoHS | unknown | unknown |
| Lifecycle | Obsolete (long-term supply via Rochester Electronics) | — |
| Logic Capacity | — | 900 usable gates |
| Macro Cells | — | 24 |
| Speed Grade (tPD) | — | 35 ns |
| Maximum Frequency | — | [DATA_NEEDED: fMAX] |
| Standby Current | — | [DATA_NEEDED: ICCSB] |
| Active Supply Current | — | [DATA_NEEDED: ICC] |
| Programmable Interconnect | — | Programmable Interconnect Array (PIA) |
| Lead-Free Option (H suffix) | — | Yes (H suffix) |