EP910LI-20 vs EP910IPC-25 Comparaison
Comparaison détaillée côte à côte de EP910LI-20 par Altera et EP910IPC-25 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP910LI-20 | EP910IPC-25 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $19,95 | $10,40 |
| Family | Altera Classic EPLD | Classic EPLD (EP910 series) |
| Macrocells | 24 | 24 |
| Maximum Operating Frequency | 62 MHz | — |
| Propagation Delay (tpd) | 20 ns | — |
| Dedicated Inputs | 16 | 12 |
| I/O Pins | 24 | — |
| Supply Voltage (VCC) | 5 V | 5 V |
| Température de fonctionnement | -40C to +85C (Industrial) | 0C to +70C (commercial grade) |
| Boîtier | 40-pin Ceramic DIP (Windowed) | 40-pin PDIP (PDIP-40) |
| Technology | CMOS, UV-erasable | — |
| Package Type | Through-Hole, Ceramic DIP with Quartz Window | — |
| Temperature Grade | Industrial (-40C to +85C) | — |
| Nombre de broches | 40 | — |
| Logic Family | EPLD (Erasable PLD) | — |
| Architecture | Sum-of-products macrocell | PAL-type EPLD, CMOS, UV/OTP |
| Pin/Package Compatibility | Pin-compatible across EP910 family | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | — |
| Manufacturer | — | Altera (now Intel) |
| Usable Gates | — | 450 |
| Product Terms | — | 240 |
| Propagation Delay (tPD) | — | 25 ns |
| Maximum Frequency (fMAX) | — | 40 MHz |
| Bidirectional I/O Lines | — | 24 |
| Total Inputs (max) | — | 36 |
| Total Outputs (max) | — | 24 |
| Type de montage | — | Through-Hole |
| Programming Method | — | EPROM cell (OTP / UV erasable) |
| Development Tool | — | MAX+PLUS II |