EP910LI-20 vs EP910IPC-25 比較
詳細な並列比較: EP910LI-20 メーカー: Altera および EP910IPC-25 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP910LI-20 | EP910IPC-25 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $19.95 | $10.40 |
| Family | Altera Classic EPLD | Classic EPLD (EP910 series) |
| Macrocells | 24 | 24 |
| Maximum Operating Frequency | 62 MHz | — |
| Propagation Delay (tpd) | 20 ns | — |
| Dedicated Inputs | 16 | 12 |
| I/O Pins | 24 | — |
| Supply Voltage (VCC) | 5 V | 5 V |
| 動作温度 | -40C to +85C (Industrial) | 0C to +70C (commercial grade) |
| パッケージ | 40-pin Ceramic DIP (Windowed) | 40-pin PDIP (PDIP-40) |
| Technology | CMOS, UV-erasable | — |
| Package Type | Through-Hole, Ceramic DIP with Quartz Window | — |
| Temperature Grade | Industrial (-40C to +85C) | — |
| ピン数 | 40 | — |
| Logic Family | EPLD (Erasable PLD) | — |
| Architecture | Sum-of-products macrocell | PAL-type EPLD, CMOS, UV/OTP |
| Pin/Package Compatibility | Pin-compatible across EP910 family | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | — |
| Manufacturer | — | Altera (now Intel) |
| Usable Gates | — | 450 |
| Product Terms | — | 240 |
| Propagation Delay (tPD) | — | 25 ns |
| Maximum Frequency (fMAX) | — | 40 MHz |
| Bidirectional I/O Lines | — | 24 |
| Total Inputs (max) | — | 36 |
| Total Outputs (max) | — | 24 |
| 実装タイプ | — | Through-Hole |
| Programming Method | — | EPROM cell (OTP / UV erasable) |
| Development Tool | — | MAX+PLUS II |