EP910PI-25 vs EP910PI-20 Comparaison
Comparaison détaillée côte à côte de EP910PI-25 par Intel et EP910PI-20 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP910PI-25 | EP910PI-20 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $10,95 | $9,75 |
| Family | Altera Classic EPLD | — |
| Device | EP910 | — |
| Macrocells | 24 | 24 |
| Dedicated Inputs | 12 | 12 |
| I/O Pins | 24 | — |
| Pin-to-Pin Propagation Delay (tPD) | 25 ns | — |
| Maximum Clock Frequency (fMAX) | 40 MHz | — |
| Supply Voltage (VCC) | 5 V nominal | 5 V (+/- 5%) |
| Process Technology | 5 V CMOS (EPROM-based) | — |
| Boîtier | PDIP-40 (Plastic DIP) | PDIP-40 (PI suffix) |
| Nombre de broches | 40 | — |
| Type de montage | Through-Hole | Through-Hole |
| Température de fonctionnement | 0C to +70C (commercial) | -40C to +85C (industrial) |
| Programmability | UV-erasable (windowed) / one-time-programmable | — |
| Statut RoHS | Non-compliant (PDIP package) | unknown |
| Device Family | — | Altera Classic EPLD Family |
| Propagation Delay (tPD) | — | 20 ns |
| Technology | — | CMOS EPROM (UV-erasable windowed variants available) |
| Configuration Method | — | Non-volatile EPROM (no boot PROM required) |
| Bidirectional I/O Pins | — | 24 |
| Maximum Counter Frequency | — | 125 MHz |
| Output Drive Current (IOL) | — | 24 mA (TTL-compatible) |
| Programmable Polarity | — | Yes (XOR gate per macrocell) |
| Macrocell Flip-Flop | — | Yes (D-type, programmable) |
| Power Dissipation | — | [DATA_NEEDED: typical power dissipation in mW] |
| Programming Interface | — | JEDEC file via Altera programming hardware |
| MIL-STD-883 Variant | — | EP910DM/883B (separate part number) |