EP910PI-25 vs EP910PI-20 Vergleich
Detaillierter Direktvergleich von EP910PI-25 von Intel und EP910PI-20 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP910PI-25 | EP910PI-20 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $10,95 | $9,75 |
| Family | Altera Classic EPLD | — |
| Device | EP910 | — |
| Macrocells | 24 | 24 |
| Dedicated Inputs | 12 | 12 |
| I/O Pins | 24 | — |
| Pin-to-Pin Propagation Delay (tPD) | 25 ns | — |
| Maximum Clock Frequency (fMAX) | 40 MHz | — |
| Supply Voltage (VCC) | 5 V nominal | 5 V (+/- 5%) |
| Process Technology | 5 V CMOS (EPROM-based) | — |
| Gehäuse | PDIP-40 (Plastic DIP) | PDIP-40 (PI suffix) |
| Pin-Anzahl | 40 | — |
| Montageart | Through-Hole | Through-Hole |
| Betriebstemperatur | 0C to +70C (commercial) | -40C to +85C (industrial) |
| Programmability | UV-erasable (windowed) / one-time-programmable | — |
| RoHS-Status | Non-compliant (PDIP package) | unknown |
| Device Family | — | Altera Classic EPLD Family |
| Propagation Delay (tPD) | — | 20 ns |
| Technology | — | CMOS EPROM (UV-erasable windowed variants available) |
| Configuration Method | — | Non-volatile EPROM (no boot PROM required) |
| Bidirectional I/O Pins | — | 24 |
| Maximum Counter Frequency | — | 125 MHz |
| Output Drive Current (IOL) | — | 24 mA (TTL-compatible) |
| Programmable Polarity | — | Yes (XOR gate per macrocell) |
| Macrocell Flip-Flop | — | Yes (D-type, programmable) |
| Power Dissipation | — | [DATA_NEEDED: typical power dissipation in mW] |
| Programming Interface | — | JEDEC file via Altera programming hardware |
| MIL-STD-883 Variant | — | EP910DM/883B (separate part number) |