EPC144ILC-20 vs EPC1441LC20N Comparaison
Comparaison détaillée côte à côte de EPC144ILC-20 par Altera et EPC1441LC20N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPC144ILC-20 | EPC1441LC20N |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | Memory ICs | Memory ICs |
| Statut du cycle de vie | Dernier achat | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $3,85 | $7,95 |
| Type de mémoire | OTP Configuration PROM (one-time programmable) | OTP EPROM (One-Time Programmable) |
| Taille de mémoire | 440 kb (kilobits) | 440 Kbit |
| Configuration Interface | Serial (Altera proprietary PS mode) | — |
| Tension d'alimentation | 5.0 V (typical) | 3.3 V (typical) |
| Standby Current | < 50 uA (CMOS standby) | — |
| Programmable | No (factory-programmed by Altera or distributor) | — |
| Boîtier | 20-pin PLCC (J-lead) | 20-PLCC (J-Lead, 9 x 9 mm) |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | 0 C to +70 C (commercial) |
| Compatible FPGA Families | Cyclone, ACEX 1K, APEX 20K, MAX 7000-series | — |
| Configuration Mode Support | PS (passive serial) and FPP (fast passive parallel) | — |
| JTAG Interface | Not present | — |
| End-of-Life Status | Last-time-buy (per Altera product change notifications) | — |
| Lead-Free / RoHS | Depends on date code; non-RoHS vintage stock common | — |
| Programming Method | Altera dedicated PROM programmer hardware | — |
| Data Retention | Permanent (anti-fuse OTP cell, no retention concern) | — |
| Nombre de broches | 20 | — |
| Type de montage | Surface Mount (PLCC J-lead) | Surface Mount (PLCC socket compatible) |
| Organisation de la mémoire | — | 55 K x 8 bit |
| Interface | — | Serial, 4-wire (nCS, DCLK, DATA, nINIT_CONF) |
| Configuration Clock (DCLK) | — | 8 MHz maximum |
| Programming Interface | — | JTAG (IEEE 1149.1) / Altera Programming Unit |
| Supported FPGA Families | — | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX |
| Cascadable | — | Yes (nCS daisy-chain) |
| Statut RoHS | — | [DATA_NEEDED: RoHS status] |
| Niveau MSL | — | [DATA_NEEDED: MSL level] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |