EPC1LI20 vs EPC2LI20 Comparaison
Comparaison détaillée côte à côte de EPC1LI20 par Altera et EPC2LI20 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPC1LI20 | EPC2LI20 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | Memory ICs | Memory ICs |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $8,50 | $5,95 |
| Type de mémoire | OTP Configuration PROM (EPROM-based) | Flash (in-system programmable) |
| Taille de mémoire | 1 Mb (1,048,576 bits) | 1.6 Mb (1,572,864 bits) |
| Configuration Interface | Altera Passive Serial / Altera Active Serial / JTAG (IEEE 1149.1) | Serial or Byte-wide (parallel) |
| Maximum Configuration Clock | 8 MHz | — |
| Supply Voltage (VCC) | 5.0 V (4.75 V to 5.25 V) | — |
| Programming Voltage (VPP) | 12.75 V (typical, factory-programmed via JTAG) | — |
| Boîtier | 20-pin PLCC (J-lead, 9x9 mm) | — |
| Nombre de broches | 20 | — |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | -40 C to +85 C (Industrial) |
| Cascading Support | Yes (nCASC pin for multi-device daisy chain) | — |
| Endurance | OTP (one-time programmable, 1000 erase-equivalent UV cycles for pre-program erase) | — |
| JTAG Programming | Yes (in-system via IEEE 1149.1) | — |
| Compatible FPGA Families | FLEX 8000, FLEX 10K, ACEX 1K, APEX 20K, Mercury | — |
| Type de montage | Surface Mount (PLCC socket compatible) | Surface Mount (PLCC socket-compatible) |
| Niveau MSL | 1 (per Partstack datasheet record) | [DATA_NEEDED: MSL level] |
| Statut RoHS | [DATA_NEEDED: RoHS status - original Altera part may be non-RoHS SnPb finish] | [DATA_NEEDED: RoHS status] |
| Programmable Type | — | In System Programmable (ISP) |
| Fonction | — | Configuration PROM for SRAM-based FPGAs |
| Supply Voltage - Operating | — | 3.0 V to 3.6 V and 4.5 V to 5.5 V (auto-sensing) |
| Boîtier / Format | — | 20-PLCC (J-lead, 9x9 mm) |
| Decompression | — | On-chip (supports compressed bitstreams) |
| JTAG / ISP Interface | — | IEEE 1532 (TCK, TMS, TDI, TDO) |
| Multi-Device Support | — | Yes (daisy-chain configuration) |
| User-Accessible Memory | — | Yes (unused flash available to user logic) |