EPC1LI20 vs EPC2LI20 对比

详细并排对比 EPC1LI20 出自 Altera 和 EPC2LI20 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC1LI20 EPC2LI20
品牌 Altera Altera
分类 Memory ICs Memory ICs
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $8.50 $5.95
存储器类型 OTP Configuration PROM (EPROM-based) Flash (in-system programmable)
存储容量 1 Mb (1,048,576 bits) 1.6 Mb (1,572,864 bits)
Configuration Interface Altera Passive Serial / Altera Active Serial / JTAG (IEEE 1149.1) Serial or Byte-wide (parallel)
Maximum Configuration Clock 8 MHz —
Supply Voltage (VCC) 5.0 V (4.75 V to 5.25 V) —
Programming Voltage (VPP) 12.75 V (typical, factory-programmed via JTAG) —
封装 20-pin PLCC (J-lead, 9x9 mm) —
引脚数量 20 —
工作温度 [DATA_NEEDED: operating temperature range] -40 C to +85 C (Industrial)
Cascading Support Yes (nCASC pin for multi-device daisy chain) —
Endurance OTP (one-time programmable, 1000 erase-equivalent UV cycles for pre-program erase) —
JTAG Programming Yes (in-system via IEEE 1149.1) —
Compatible FPGA Families FLEX 8000, FLEX 10K, ACEX 1K, APEX 20K, Mercury —
安装类型 Surface Mount (PLCC socket compatible) Surface Mount (PLCC socket-compatible)
MSL 等级 1 (per Partstack datasheet record) [DATA_NEEDED: MSL level]
RoHS 状态 [DATA_NEEDED: RoHS status - original Altera part may be non-RoHS SnPb finish] [DATA_NEEDED: RoHS status]
Programmable Type — In System Programmable (ISP)
功能 — Configuration PROM for SRAM-based FPGAs
Supply Voltage - Operating — 3.0 V to 3.6 V and 4.5 V to 5.5 V (auto-sensing)
封装 / 外壳 — 20-PLCC (J-lead, 9x9 mm)
Decompression — On-chip (supports compressed bitstreams)
JTAG / ISP Interface — IEEE 1532 (TCK, TMS, TDI, TDO)
Multi-Device Support — Yes (daisy-chain configuration)
User-Accessible Memory — Yes (unused flash available to user logic)

数据手册与资源

浏览全部产品 创建 BOM 获取报价