EPC1PC8CC vs EPC1LI20 Comparaison
Comparaison détaillée côte à côte de EPC1PC8CC par Intel et EPC1LI20 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPC1PC8CC | EPC1LI20 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | Memory ICs | Memory ICs |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,95 | $8,50 |
| Taille de mémoire | 1 Mbit (1,048,576 bits) | 1 Mb (1,048,576 bits) |
| Type de mémoire | EPROM (OTP, UV-erasable window optional) | OTP Configuration PROM (EPROM-based) |
| Fonction | FPGA Configuration PROM | — |
| Configuration Interface | Altera Passive Serial (PS), 4-wire (nSTATUS, nCONFIG, DCLK, DATA0) | Altera Passive Serial / Altera Active Serial / JTAG (IEEE 1149.1) |
| Supply Voltage VCC | 3.0 V to 3.6 V (typical 3.3 V) | — |
| Maximum DCLK Frequency | 17.6 MHz (17.6 Mb/s effective bitstream rate) | — |
| Plage de température de fonctionnement | [DATA_NEEDED: full industrial range from datasheet] | — |
| Boîtier | PDIP-8 (Plastic DIP, 8-pin, 0.1" pitch) | 20-pin PLCC (J-lead, 9x9 mm) |
| Type de montage | Through-Hole (DIP socketable) | Surface Mount (PLCC socket compatible) |
| Cascade Support | Not supported in DIP-8 package (nCASC pin not exposed) | — |
| Programming Interface | JTAG via Altera Quartus / Quartus Prime ByteBlaster | — |
| Error Detection | Built-in CRC during configuration transfer | — |
| Niveau MSL | 1 (unlimited floor life) | 1 (per Partstack datasheet record) |
| Lead-Free / RoHS | Not lead-free (legacy Altera/Intel PC8 suffix is Sn-Pb finish); RoHS non-compliant variant | — |
| Compatible FPGA Families | ACEX 1K, APEX 20K, APEX II, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, FLEX 8000, MAX 7000B/AE/S, MAX 9000, Mercury, Stratix, Stratix II, Arria | FLEX 8000, FLEX 10K, ACEX 1K, APEX 20K, Mercury |
| Nombre de broches | 8 | 20 |
| Maximum Configuration Clock | — | 8 MHz |
| Supply Voltage (VCC) | — | 5.0 V (4.75 V to 5.25 V) |
| Programming Voltage (VPP) | — | 12.75 V (typical, factory-programmed via JTAG) |
| Température de fonctionnement | — | [DATA_NEEDED: operating temperature range] |
| Cascading Support | — | Yes (nCASC pin for multi-device daisy chain) |
| Endurance | — | OTP (one-time programmable, 1000 erase-equivalent UV cycles for pre-program erase) |
| JTAG Programming | — | Yes (in-system via IEEE 1149.1) |
| Statut RoHS | — | [DATA_NEEDED: RoHS status - original Altera part may be non-RoHS SnPb finish] |