EPC1PC8CC vs EPC1LI20 对比
详细并排对比 EPC1PC8CC 出自 Intel 和 EPC1LI20 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPC1PC8CC | EPC1LI20 |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | Memory ICs | Memory ICs |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $9.95 | $8.50 |
| 存储容量 | 1 Mbit (1,048,576 bits) | 1 Mb (1,048,576 bits) |
| 存储器类型 | EPROM (OTP, UV-erasable window optional) | OTP Configuration PROM (EPROM-based) |
| 功能 | FPGA Configuration PROM | — |
| Configuration Interface | Altera Passive Serial (PS), 4-wire (nSTATUS, nCONFIG, DCLK, DATA0) | Altera Passive Serial / Altera Active Serial / JTAG (IEEE 1149.1) |
| Supply Voltage VCC | 3.0 V to 3.6 V (typical 3.3 V) | — |
| Maximum DCLK Frequency | 17.6 MHz (17.6 Mb/s effective bitstream rate) | — |
| 工作温度范围 | [DATA_NEEDED: full industrial range from datasheet] | — |
| 封装 | PDIP-8 (Plastic DIP, 8-pin, 0.1" pitch) | 20-pin PLCC (J-lead, 9x9 mm) |
| 安装类型 | Through-Hole (DIP socketable) | Surface Mount (PLCC socket compatible) |
| Cascade Support | Not supported in DIP-8 package (nCASC pin not exposed) | — |
| Programming Interface | JTAG via Altera Quartus / Quartus Prime ByteBlaster | — |
| Error Detection | Built-in CRC during configuration transfer | — |
| MSL 等级 | 1 (unlimited floor life) | 1 (per Partstack datasheet record) |
| Lead-Free / RoHS | Not lead-free (legacy Altera/Intel PC8 suffix is Sn-Pb finish); RoHS non-compliant variant | — |
| Compatible FPGA Families | ACEX 1K, APEX 20K, APEX II, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, FLEX 8000, MAX 7000B/AE/S, MAX 9000, Mercury, Stratix, Stratix II, Arria | FLEX 8000, FLEX 10K, ACEX 1K, APEX 20K, Mercury |
| 引脚数量 | 8 | 20 |
| Maximum Configuration Clock | — | 8 MHz |
| Supply Voltage (VCC) | — | 5.0 V (4.75 V to 5.25 V) |
| Programming Voltage (VPP) | — | 12.75 V (typical, factory-programmed via JTAG) |
| 工作温度 | — | [DATA_NEEDED: operating temperature range] |
| Cascading Support | — | Yes (nCASC pin for multi-device daisy chain) |
| Endurance | — | OTP (one-time programmable, 1000 erase-equivalent UV cycles for pre-program erase) |
| JTAG Programming | — | Yes (in-system via IEEE 1149.1) |
| RoHS 状态 | — | [DATA_NEEDED: RoHS status - original Altera part may be non-RoHS SnPb finish] |