EPC1PC8CEC vs EPC1PC8N Comparaison
Comparaison détaillée côte à côte de EPC1PC8CEC par Intel et EPC1PC8N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPC1PC8CEC | EPC1PC8N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | Memory ICs | Memory ICs |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $5,85 | $4,40 |
| Type de mémoire | OTP Configuration PROM (non-volatile) | OTP (One-Time Programmable) Configuration PROM |
| Taille de mémoire | 1 Mbit (1,046,496 bits) | 1 Mbit |
| Organisation de la mémoire | 1,046,496 x 1 bit (serial) | Serial (DCLK + DATA) |
| Configuration Interface | Altera serial (DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE) | — |
| Supply Voltage VCC | 3.0 V to 3.6 V (3.3 V typical) | — |
| Programming Method | Factory OTP (one-time programmable) | — |
| Cascadable | Yes (nCASC pin for multi-PROM chains) | — |
| JTAG Boundary Scan | Yes | — |
| Boîtier | 8-pin PDIP (300-mil, through-hole) | 8-pin PDIP (PC8N suffix) |
| Température de fonctionnement | -40 C to +85 C (industrial, suffix CEC) | [DATA_NEEDED: operating temperature range C] |
| Technology | CMOS EPROM cell | — |
| Compatible FPGA Families | FLEX 10K, APEX, ACEX, Cyclone, MAX (Altera / Intel FPGA) | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance status] | Compliant (PC8N suffix indicates lead-free) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Niveau MSL | [DATA_NEEDED: MSL rating] | — |
| Tension d'alimentation | — | 3.0 V to 3.6 V |
| Supply Voltage (Typical) | — | 3.3 V |
| Interface | — | Altera PS Serial / JTAG (IEEE 1149.1) |
| Programmability | — | In-system via JTAG; OTP after programming |
| Standby Current | — | [DATA_NEEDED: standby current uA] |
| Active Current | — | [DATA_NEEDED: active current mA] |
| Type de montage | — | Through-Hole |
| Configuration Mode | — | Serial (PS mode) |
| JTAG Compliance | — | IEEE Std. 1149.1-1990 boundary-scan |