EPC20LI20N vs EPC2LI20N Comparaison
Comparaison détaillée côte à côte de EPC20LI20N par Intel et EPC2LI20N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPC20LI20N | EPC2LI20N |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | Memory ICs |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $17,50 | $5,10 |
| Type de mémoire | EPROM (UV-erasable, in-system programmable) | Non-volatile configuration PROM (Flash) |
| Taille de mémoire | 1.6 Mbit (65,536 x 1-bit words, approx. 200 Kbyte) | 1.6 Mbit |
| Interface | Serial (4-pin Altera Passive Serial: DCLK, DATA0, nCONFIG, nSTATUS) | — |
| Tension d'alimentation | 3.3 V (5.0 V compatible variant in same family) | — |
| Configuration Clock | Up to 10 MHz | — |
| Target FPGA Families | APEX II, APEX 20K/KC/KE, Mercury, ACEX 1K, FLEX 6000/10KE/10KA | — |
| Boîtier | 20-pin PLCC (9x9 mm, JEDEC MS-018) | — |
| Type de montage | Surface Mount (PLCC socket or direct solder) | Surface Mount |
| Programming Interface | IEEE 1532 / JTAG (in-system) | — |
| Température de fonctionnement | -40C to +85C (industrial) | [DATA_NEEDED: operating temperature range] |
| Standby Current | [DATA_NEEDED: standby current uA] | — |
| Active Configuration Current | [DATA_NEEDED: ICC active mA] | — |
| Programming Voltage | [DATA_NEEDED: VPP] | — |
| Programming Cycles | [DATA_NEEDED: endurance cycles] | — |
| Niveau MSL | [DATA_NEEDED: MSL rating] | — |
| Lead-Free / RoHS | [DATA_NEEDED: lead-free status] | — |
| Multi-Device Daisy-Chain | Supported via nCASC pin | — |
| Programmable Type | — | In System Programmable (ISP via JTAG) |
| Configuration Mode | — | Serial |
| Maximum Configuration Frequency | — | 10 MHz |
| Supply Voltage (VCCINT) | — | 3.0 V to 3.6 V |
| Supply Voltage (VCCIO) | — | 4.5 V to 5.5 V |
| Boîtier / Format | — | 20-PLCC (J-Lead), 9x9 mm |
| Packaging | — | Tube |
| Supported FPGA Series | — | ACEX 1K, APEX II, Cyclone, Stratix II |
| JTAG Interface | — | IEEE 1149.1 boundary scan (TCK/TDI/TMS/TDO) |
| Configuration Pins | — | nCS, DCLK, DATA, nCONFIG, nSTATUS, CONF_DONE |
| Statut RoHS | — | [DATA_NEEDED: RoHS status] |