EPC21C20U vs EPC1LI20 Comparaison
Comparaison détaillée côte à côte de EPC21C20U par Intel et EPC1LI20 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPC21C20U | EPC1LI20 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | Memory ICs | Memory ICs |
| Statut du cycle de vie | Actif | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,85 | $8,50 |
| Manufacturer | Intel / Altera | — |
| Product Type | Configuration Device (Boot Flash) | — |
| Taille de mémoire | 20 Mbit (2.5 Mbyte) | 1 Mb (1,048,576 bits) |
| Supply Voltage (VCC) | 3.0 V to 3.6 V (3.3 V typical) | 5.0 V (4.75 V to 5.25 V) |
| Interface | Altera/Intel Passive Serial (PS) and Active Serial (AS), JTAG (IEEE 1149.1) | — |
| Boîtier | 20-pin UBGA (Ultra FineLine BGA) - also called 20-pin FBGA | 20-pin PLCC (J-lead, 9x9 mm) |
| In-System Programmability | Yes (via JTAG) | — |
| Bitstream Compression Support | Yes | — |
| Cascade (Multi-Device) Support | Yes (nCASC daisy-chain) | — |
| Supported FPGA Families | APEX II, APEX 20KE, APEX 20KC, Mercury, Stratix, Cyclone, ACEX 1K, FLEX 10KE | — |
| Température de fonctionnement | -40 C to +85 C (industrial) | [DATA_NEEDED: operating temperature range] |
| Type de montage | Surface Mount (BGA) | Surface Mount (PLCC socket compatible) |
| Statut RoHS | Compliant (per Intel/Altera product page) | [DATA_NEEDED: RoHS status - original Altera part may be non-RoHS SnPb finish] |
| Lead-Free | Yes | — |
| Configuration Mode | Passive Serial (PS) / Active Serial (AS) via FPGA controller | — |
| Type de mémoire | — | OTP Configuration PROM (EPROM-based) |
| Configuration Interface | — | Altera Passive Serial / Altera Active Serial / JTAG (IEEE 1149.1) |
| Maximum Configuration Clock | — | 8 MHz |
| Programming Voltage (VPP) | — | 12.75 V (typical, factory-programmed via JTAG) |
| Nombre de broches | — | 20 |
| Cascading Support | — | Yes (nCASC pin for multi-device daisy chain) |
| Endurance | — | OTP (one-time programmable, 1000 erase-equivalent UV cycles for pre-program erase) |
| JTAG Programming | — | Yes (in-system via IEEE 1149.1) |
| Compatible FPGA Families | — | FLEX 8000, FLEX 10K, ACEX 1K, APEX 20K, Mercury |
| Niveau MSL | — | 1 (per Partstack datasheet record) |