EPC21C20U vs EPC1LI20N Comparaison
Comparaison détaillée côte à côte de EPC21C20U par Intel et EPC1LI20N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPC21C20U | EPC1LI20N |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | Memory ICs | Memory ICs |
| Statut du cycle de vie | Actif | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,85 | $7,80 |
| Manufacturer | Intel / Altera | — |
| Product Type | Configuration Device (Boot Flash) | — |
| Taille de mémoire | 20 Mbit (2.5 Mbyte) | 1 Mbit (1,048,576 bits) |
| Supply Voltage (VCC) | 3.0 V to 3.6 V (3.3 V typical) | — |
| Interface | Altera/Intel Passive Serial (PS) and Active Serial (AS), JTAG (IEEE 1149.1) | — |
| Boîtier | 20-pin UBGA (Ultra FineLine BGA) - also called 20-pin FBGA | — |
| In-System Programmability | Yes (via JTAG) | — |
| Bitstream Compression Support | Yes | — |
| Cascade (Multi-Device) Support | Yes (nCASC daisy-chain) | — |
| Supported FPGA Families | APEX II, APEX 20KE, APEX 20KC, Mercury, Stratix, Cyclone, ACEX 1K, FLEX 10KE | — |
| Température de fonctionnement | -40 C to +85 C (industrial) | -40C to +85C (Industrial) |
| Type de montage | Surface Mount (BGA) | Surface Mount (PLCC socket or solder) |
| Statut RoHS | Compliant (per Intel/Altera product page) | Compliant |
| Lead-Free | Yes | — |
| Configuration Mode | Passive Serial (PS) / Active Serial (AS) via FPGA controller | — |
| Type de mémoire | — | OTP Configuration PROM (One-Time Programmable) |
| Type d'interface | — | Serial (Altera proprietary configuration protocol) |
| Boîtier / Format | — | 20-LCC (J-Lead), PLCC-20 |
| Package Dimensions | — | 9 mm x 9 mm (PLCC-20 J-lead) |
| Supply Voltage - VCCINT | — | 3.0 V to 3.6 V |
| Supply Voltage - VCCIO | — | 4.5 V to 5.5 V |
| JTAG / Boundary Scan | — | IEEE 1149.1 compliant (for programming) |
| Programmable Compression | — | Yes (reduces bitstream 30-55%) |
| Packaging | — | Tube |
| Lead Finish | — | Matte Sn (per JEDEC J-STD-020) |
| Target FPGA Families | — | Cyclone, FLEX 10K, APEX, ACEX 1K (LUT-based) |