EPC2LC20NA vs EPC1LI20 Comparaison
Comparaison détaillée côte à côte de EPC2LC20NA par Altera et EPC1LI20 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPC2LC20NA | EPC1LI20 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | Memory ICs | Memory ICs |
| Statut du cycle de vie | Dernier achat | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $5,50 | $8,50 |
| Manufacturer | Altera Corporation (Intel Programmable Solutions Group) | — |
| Type de mémoire | Configuration PROM (Flash-based, ISP) | OTP Configuration PROM (EPROM-based) |
| Memory Density | 1.6 Mbit | — |
| Operating Voltage (VCC) | 3.3 V | — |
| Interface | Serial (passive-serial) data output to FPGA | — |
| Programmability | In-system programmable via IEEE 1532 JTAG | — |
| Boîtier | 20-pin PLCC (9x9 mm) | 20-pin PLCC (J-lead, 9x9 mm) |
| Type de montage | Surface Mount (PLCC socket compatible) | Surface Mount (PLCC socket compatible) |
| Température de fonctionnement | -40C to +85C (industrial grade) | [DATA_NEEDED: operating temperature range] |
| Supported FPGA Families | APEX 20K, ACEX 1K, FLEX 10K, FLEX 6000, Cyclone, Mercury | — |
| JTAG Compliance | IEEE Std 1149.1 / IEEE 1532 | — |
| Configuration Mode | Passive Serial (PS) | — |
| Statut RoHS | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS status - original Altera part may be non-RoHS SnPb finish] |
| Daisy-Chain Support | Yes | — |
| Recommended Companion FPGA | Altera Cyclone, FLEX 10K, APEX 20K series | — |
| Taille de mémoire | — | 1 Mb (1,048,576 bits) |
| Configuration Interface | — | Altera Passive Serial / Altera Active Serial / JTAG (IEEE 1149.1) |
| Maximum Configuration Clock | — | 8 MHz |
| Supply Voltage (VCC) | — | 5.0 V (4.75 V to 5.25 V) |
| Programming Voltage (VPP) | — | 12.75 V (typical, factory-programmed via JTAG) |
| Nombre de broches | — | 20 |
| Cascading Support | — | Yes (nCASC pin for multi-device daisy chain) |
| Endurance | — | OTP (one-time programmable, 1000 erase-equivalent UV cycles for pre-program erase) |
| JTAG Programming | — | Yes (in-system via IEEE 1149.1) |
| Compatible FPGA Families | — | FLEX 8000, FLEX 10K, ACEX 1K, APEX 20K, Mercury |
| Niveau MSL | — | 1 (per Partstack datasheet record) |