EPC2LC21N vs EPC2LC22N Comparaison
Comparaison détaillée côte à côte de EPC2LC21N par Altera et EPC2LC22N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPC2LC21N | EPC2LC22N |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | Memory ICs | Memory ICs |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $10,95 | $9,75 |
| Type de mémoire | Configuration PROM (EPROM/EEPROM-based) | Configuration PROM (non-volatile) |
| Taille de mémoire | 1.6 Mbit | 1.6 Mbit |
| Tension d'alimentation | 3.3 V | 2.5 V (LC core) |
| Interface | Serial (Altera FPP/PS configuration) | Serial configuration / JTAG (IEEE 1149.1) |
| Programmability | In-system programmable via JTAG (ISP) | In-system programmable (ISP) via JTAG |
| Configuration Method | Serial data stream to FPGA DCLK/DATA | — |
| Boîtier | 20-pin PLCC (9x9 mm) | PLCC-22 (Plastic Leaded Chip Carrier) |
| Type de montage | Surface Mount (PLCC socket compatible) | Surface Mount / Through Hole socket |
| Température de fonctionnement | -40C to +85C (industrial) | [DATA_NEEDED: operating temperature range] |
| JTAG Support | Yes (IEEE 1149.1 boundary-scan) | — |
| Endurance (ISP writes) | [DATA_NEEDED: ISP write endurance cycles] | — |
| Data Retention | [DATA_NEEDED: data retention years] | — |
| Statut RoHS | Compliant | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | Yes | [DATA_NEEDED: lead-free status] |
| Target FPGAs | Altera APEX, ACEX, FLEX, Cyclone, MAX series | — |
| Cascadable | — | Yes - supports multi-device configuration chains |
| Configuration Compatibility | — | Altera APEX, ACEX, Mercury, Cyclone, Stratix series FPGAs |
| JTAG Pins | — | TCK, TMS, TDI, TDO |
| Internal Oscillator | — | Yes (built-in configuration timing) |
| Niveau MSL | — | [DATA_NEEDED: MSL rating] |
| Status | — | Legacy / Obsolete (replaced by flash-based FPGA configuration) |