EPF10K130EFC484-2 vs EPF10K50EFC484-2 Comparaison
Comparaison détaillée côte à côte de EPF10K130EFC484-2 par Altera et EPF10K50EFC484-2 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPF10K50EFC484-2 - 50K Gates FLEX-10KE FPGA, 484-BGA | Intel / Altera
EPF10K50EFC484-2 ObsoleteComparaison des spécifications
| Paramètre | EPF10K130EFC484-2 | EPF10K50EFC484-2 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $105,00 | $52,75 |
| Family | FLEX 10KE | FLEX-10KE |
| Logic Elements | 6,656 | — |
| Equivalent Gates | 130,000 | — |
| Embedded Memory (bits) | 65,536 | — |
| User I/O Pins (max) | 369 | — |
| Number of Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | — |
| Number of Embedded Array Blocks (EABs) | [DATA_NEEDED: EAB count] | — |
| Maximum Operating Frequency | 333.33 MHz | — |
| Core Voltage | 2.5 V (±5%) | 2.5 V |
| Process Technology | 0.22 µm CMOS | 0.22 micrometer CMOS |
| Package Type | 484-pin FineLine BGA (FBGA) | — |
| Package Dimensions | 23 x 23 mm, 1.0 mm pitch | — |
| Plage de température de fonctionnement | [DATA_NEEDED: commercial or industrial grade] | — |
| Speed Grade | -2 | -2 |
| Type de montage | Surface Mount | Surface Mount (BGA) |
| Statut RoHS | unknown | — |
| Configuration Method | Serial/Parallel via Altera programming tools | — |
| I/O Standard Support | LVTTL, LVCMOS, PCI, GTL+, SSTL (refer to datasheet) | — |
| Logic Elements (LEs) | — | 2,880 |
| Typical Gates | — | 50,000 |
| Embedded Memory (Bits) | — | 40,960 |
| Embedded Array Blocks (EABs) | — | 12 (each 2,048 bits) |
| Maximum User I/O Pins | — | 220 |
| Boîtier | — | 484-ball FineLine BGA (FBGA) |
| Internal Frequency | — | 200 MHz |
| Température de fonctionnement | — | 0 C to +70 C (Commercial) |
| JTAG Boundary-Scan | — | IEEE Std. 1149.1-1990 compliant |
| PCI Compliance | — | PCI Local Bus Specification Rev. 2.2 at 33/66 MHz (3.3 V); 5.0 V at speed grade -1 |