EPF10K130EFC484-2 vs EPF10K50EFC484-2 对比

详细并排对比 EPF10K130EFC484-2 出自 Altera 和 EPF10K50EFC484-2 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPF10K130EFC484-2 EPF10K50EFC484-2
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $105.00 $52.75
Family FLEX 10KE FLEX-10KE
Logic Elements 6,656 —
Equivalent Gates 130,000 —
Embedded Memory (bits) 65,536 —
User I/O Pins (max) 369 —
Number of Logic Array Blocks (LABs) [DATA_NEEDED: LAB count] —
Number of Embedded Array Blocks (EABs) [DATA_NEEDED: EAB count] —
Maximum Operating Frequency 333.33 MHz —
Core Voltage 2.5 V (±5%) 2.5 V
Process Technology 0.22 µm CMOS 0.22 micrometer CMOS
Package Type 484-pin FineLine BGA (FBGA) —
Package Dimensions 23 x 23 mm, 1.0 mm pitch —
工作温度范围 [DATA_NEEDED: commercial or industrial grade] —
Speed Grade -2 -2
安装类型 Surface Mount Surface Mount (BGA)
RoHS 状态 unknown —
Configuration Method Serial/Parallel via Altera programming tools —
I/O Standard Support LVTTL, LVCMOS, PCI, GTL+, SSTL (refer to datasheet) —
Logic Elements (LEs) — 2,880
Typical Gates — 50,000
Embedded Memory (Bits) — 40,960
Embedded Array Blocks (EABs) — 12 (each 2,048 bits)
Maximum User I/O Pins — 220
封装 — 484-ball FineLine BGA (FBGA)
Internal Frequency — 200 MHz
工作温度 — 0 C to +70 C (Commercial)
JTAG Boundary-Scan — IEEE Std. 1149.1-1990 compliant
PCI Compliance — PCI Local Bus Specification Rev. 2.2 at 33/66 MHz (3.3 V); 5.0 V at speed grade -1

数据手册与资源

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