EPF10K130EQI240-2 vs EPF10K130EQI240-2N Comparaison
Comparaison détaillée côte à côte de EPF10K130EQI240-2 par Intel et EPF10K130EQI240-2N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EPF10K130EQI240-2 - FLEX 10KE FPGA, 130K Gates, 240-PQFP | Intel / Altera
EPF10K130EQI240-2 ObsoleteAltera
EPF10K130EQI240-2N - 130K Gates FLEX-10KE FPGA, 240-PQFP | Intel / Altera
EPF10K130EQI240-2N NrndComparaison des spécifications
| Paramètre | EPF10K130EQI240-2 | EPF10K130EQI240-2N |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $89,50 | $60,00 |
| Series | FLEX 10KE | FLEX-10KE |
| Family | FLEX 10KE (SRAM-based FPGA) | FLEX 10KE Embedded Programmable Logic |
| Number of Logic Elements / Cells | 6656 | — |
| Number of LABs / CLBs | 832 | — |
| Total RAM Bits | 65536 | 65,536 bits (EAB) |
| Typical Gates | 130000 | — |
| Maximum System Gates | 342000 | — |
| Number of User I/O | 186 | — |
| Number of Gates | 342000 | — |
| Voltage Supply | 5.0 V core, multi-volt I/O (5.0V / 3.3V / 2.5V) | — |
| Température de fonctionnement | -40C to +85C | -40 °C to +85 °C (Industrial, I grade) |
| Type de montage | Surface Mount (PQFP with gull-wing leads) | Surface Mount (PQFP) |
| Boîtier / Format | 240-BFQFP (PQFP-240) | — |
| Speed Grade | -2 | — |
| Programmability Type | SRAM, in-system programmable via JTAG (IEEE 1149.1) | — |
| Statut RoHS | Compliant | [DATA_NEEDED: RoHS compliance] |
| Logic Elements / Cells | — | 6,656 |
| Number of LABs | — | 832 |
| Number of User I/Os | — | 186 |
| Number of Gates (typical) | — | 130,000 |
| Boîtier | — | 240-BFQFP (PQFP) |
| Tension d'alimentation | — | 3.3 V core |
| I/O Voltage Tolerance | — | MultiVolt 3.3 V / 5 V tolerant |
| Propagation Delay (typical) | — | 0.6 ns |
| Logic Family | — | CMOS, SRAM-based |
| Configuration Method | — | Passive Serial (PS), JTAG |
| Lead Free | — | [DATA_NEEDED: lead-free status] |