EPF10K130EQI240-2 vs EPF10K30RI240-4N Comparaison
Comparaison détaillée côte à côte de EPF10K130EQI240-2 par Intel et EPF10K30RI240-4N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EPF10K130EQI240-2 - FLEX 10KE FPGA, 130K Gates, 240-PQFP | Intel / Altera
EPF10K130EQI240-2 ObsoleteComparaison des spécifications
| Paramètre | EPF10K130EQI240-2 | EPF10K30RI240-4N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $89,50 | $52,40 |
| Series | FLEX 10KE | FLEX-10K® |
| Family | FLEX 10KE (SRAM-based FPGA) | FLEX 10K |
| Number of Logic Elements / Cells | 6656 | — |
| Number of LABs / CLBs | 832 | — |
| Total RAM Bits | 65536 | 12,288 |
| Typical Gates | 130000 | — |
| Maximum System Gates | 342000 | — |
| Number of User I/O | 186 | — |
| Number of Gates | 342000 | — |
| Voltage Supply | 5.0 V core, multi-volt I/O (5.0V / 3.3V / 2.5V) | — |
| Température de fonctionnement | -40C to +85C | 0 °C to +70 °C |
| Type de montage | Surface Mount (PQFP with gull-wing leads) | Surface Mount |
| Boîtier / Format | 240-BFQFP (PQFP-240) | 240-BFQFP Exposed Pad (RQFP-240) |
| Speed Grade | -2 | -4 |
| Programmability Type | SRAM, in-system programmable via JTAG (IEEE 1149.1) | — |
| Statut RoHS | Compliant | [DATA_NEEDED: rohs status] |
| Logic Elements / Cells | — | 1,728 |
| Number of LABs/CLBs | — | 216 |
| Number of Logic Elements per LAB | — | 8 |
| Typical Gate Count | — | 30,000 gates |
| User I/O Count | — | 189 |
| Voltage - Supply (VCCINT) | — | 5 V |
| Voltage - I/O (VCCIO) | — | 3.3 V or 5 V (MultiVolt) |
| Process Technology | — | 0.42 µm CMOS SRAM |
| Maximum Internal Frequency | — | 125 MHz (typical, design-dependent) |
| Configuration Method | — | SRAM - serial via BitBlaster / ByteBlasterMV / Jam STAPL |
| JTAG (IEEE 1149.1) | — | Yes |
| PCI Clamping / Slew-Rate Control | — | Yes (per-pin, via Altera logic options) |
| Lead-Free / Halogen-Free | — | [DATA_NEEDED: lead-free / halogen-free] |