EPF10K200SFI672-2N vs EPF10K200SFI672-2 Comparaison
Comparaison détaillée côte à côte de EPF10K200SFI672-2N par Intel et EPF10K200SFI672-2 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPF10K200SFI672-2N | EPF10K200SFI672-2 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $138,00 | $99,50 |
| Family | FLEX 10KE | FLEX 10KE |
| Device Logic Elements | 9,984 | — |
| Typical Gates | 200,000 | — |
| Maximum System Gates | [DATA_NEEDED: maximum system gates] | — |
| Embedded Memory (EAB) | 12 EABs, 98,304 bits total | — |
| User I/Os | 470 | 470 |
| Process Technology | 0.22 um CMOS | 0.22 µm (Arrow lists 0.42 µm) |
| Core Supply Voltage | 2.5 V | 2.5 V |
| I/O Supply Voltage | 3.3 V (5.0 V tolerant) | — |
| Operating Temperature Grade | Industrial (-40C to +85C) | — |
| Speed Grade | -2 (mid) | -2 |
| Boîtier | 672-ball FBGA (FineLine BGA), 27 x 27 mm, 1.0 mm pitch | 672-pin FineLine BGA (FBGA) |
| Type de montage | Surface Mount | — |
| JTAG Boundary-Scan | IEEE Std. 1149.1 compliant | — |
| Configuration Method | SRAM-based (requires external boot ROM) | — |
| Statut RoHS | Lead-free (N suffix) | Not compliant (per Arrow EU RoHS listing) |
| Logic Elements | — | 9984 |
| System Gates | — | 200000 |
| Logic Array Blocks (LABs) | — | 1248 |
| Embedded Array Blocks (EABs) | — | 24 |
| Embedded Memory (EAB SRAM) | — | 96 Kbit |
| Distributed Memory | — | 98304 bits |
| Température de fonctionnement | — | Industrial (-40C to +85C) |
| JTAG Boundary Scan | — | IEEE Std. 1149.1-1990 compliant |
| PCI Compliance | — | PCI Local Bus Specification Rev 2.2 (3.3 V, 33/66 MHz) on -1 speed grade |
| Programming | — | SRAM-based, in-system programmable |