EPF10K50SQC240-1 vs EPF10K50SQC240-3N Comparaison
Comparaison détaillée côte à côte de EPF10K50SQC240-1 par Intel et EPF10K50SQC240-3N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPF10K50SQC240-3N - FLEX 10KE 50K Gates FPGA, 240-PQFP | Altera / Intel
EPF10K50SQC240-3N ObsoleteComparaison des spécifications
| Paramètre | EPF10K50SQC240-1 | EPF10K50SQC240-3N |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $142,50 | $60,00 |
| Series | FLEX-10KS | — |
| Family | FLEX 10K | FLEX 10KE |
| Logic Cells / Elements | 2880 | 2,880 |
| Gates | 50,000 (typical) | — |
| Number of LABs/CLBs | 360 | — |
| Number of Logic Elements / Cells | 2880 | — |
| Total RAM Bits | 40,960 | — |
| Number of I/O | 189 | — |
| Voltage - Supply | 2.375 V to 2.625 V (2.5 V nominal) | — |
| Température de fonctionnement | 0 °C to +70 °C (commercial grade) | 0 °C to 70 °C (Commercial) |
| Internal Frequency | 250 MHz (max) | — |
| Propagation Delay | 0.6 ns (typ) | — |
| Process Technology | 0.22 µm CMOS SRAM | 0.22 µm CMOS |
| Type de montage | Surface Mount | Surface Mount |
| Boîtier / Format | 240-BFQFP (Power QFP, gull-wing) | — |
| Supplier Device Package | 240-PQFP (32 × 32 mm) | — |
| Programmability | In-system via JTAG (IEEE 1149.1) | — |
| Statut RoHS | Non-compliant (legacy PQFP, SnPb finish per part suffix 'C') | Compliant (Pb-free N suffix) |
| Logic Family | — | CMOS |
| Typical Gates | — | 50,000 |
| System Gates | — | 40,960 |
| Logic Array Blocks (LABs) | — | 360 |
| Embedded Array Blocks (EABs) | — | 12 |
| On-chip EAB Memory | — | 24 Kbits |
| User I/Os | — | 189 (per DigiKey listing); 274 user I/Os (per Digchip listing) |
| Number of I/Os (per distributor) | — | 189 (DigiKey / Mouser) |
| Propagation Delay (tpd) | — | 0.6 ns |
| Internal Frequency (Fmax) | — | 166.67 MHz |
| Core Supply Voltage (VCCINT) | — | 2.5 V |
| I/O Voltage (VCCIO) | — | MultiVolt: 2.5 V / 3.3 V / 5.0 V tolerant |
| Boîtier | — | 240-pin PQFP (Power Quad Flat Pack), 34.60 x 34.6 mm, 0.5 mm pitch |
| Speed Grade | — | -3 (faster Fmax) |
| Lead-Free Finish (N suffix) | — | Yes |
| JTAG Boundary Scan | — | IEEE Std. 1149.1 compliant |
| Programming Technology | — | SRAM-based, in-system reconfigurable via JTAG |
| Design Tool | — | Altera Quartus II (FLEX 10KE support) |