EPF6010ATC100-2 vs EPF6010ATI100-2N Comparaison
Comparaison détaillée côte à côte de EPF6010ATC100-2 par Altera et EPF6010ATI100-2N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPF6010ATC100-2 - FLEX 6000 FPGA, 880 Gates, 71 I/O | Intel (Altera)
EPF6010ATC100-2 ObsoleteComparaison des spécifications
| Paramètre | EPF6010ATC100-2 | EPF6010ATI100-2N |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $14,20 | $11,50 |
| Series | FLEX 6000 | — |
| Family | SRAM-based FPGA | FLEX 6000 |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements / Gates | 880 gates (typical) | — |
| Logic Array Blocks (LABs) | 88 | 88 |
| User I/O Pins | 71 | — |
| Number of Logic Cells | 880 (per FLEX 6000 family datasheet) | — |
| Boîtier | 100-pin TQFP (14x14 mm) | TQFP-100 (Fine-line BGA-100 equivalent land pattern) |
| Speed Grade | -2 | — |
| Température de fonctionnement | 0C to 70C (commercial) | — |
| Core Supply Voltage | 3.0 V to 3.6 V (typical 3.3 V) | 3.3 V |
| I/O Supply Voltage | 3.3 V (5 V tolerant inputs per FLEX 6000 family) | 3.3 V (5 V tolerant input) |
| Configuration Interface | JTAG (IEEE 1149.1) + serial configuration | — |
| Type de montage | Surface Mount | Surface Mount |
| Niveau MSL | [DATA_NEEDED: moisture sensitivity level] | [DATA_NEEDED: MSL Level] |
| Statut RoHS | [DATA_NEEDED: RoHS compliance status] | Unknown - legacy Altera-era product |
| Process Node | [DATA_NEEDED: CMOS process node] | — |
| Total RAM Bits | [DATA_NEEDED: embedded RAM] | — |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| System Gates | — | 10,000 |
| Logic Elements / Cells | — | 880 |
| Maximum User I/O | — | 71 |
| Process Technology | — | 0.42 µm CMOS SRAM |
| Maximum Internal Frequency | — | 166.67 MHz |
| Configuration Method | — | SRAM, serial/parallel via EPC PROM or JTAG |
| Plage de température de fonctionnement | — | -40 °C to +85 °C (Industrial) |
| Lead-Free | — | Unknown |