EPF6010ATC100-2 vs EPF6010ATI100-2N 比較
詳細な並列比較: EPF6010ATC100-2 メーカー: Altera および EPF6010ATI100-2N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EPF6010ATC100-2 - FLEX 6000 FPGA, 880 Gates, 71 I/O | Intel (Altera)
EPF6010ATC100-2 Obsolete仕様比較
| パラメータ | EPF6010ATC100-2 | EPF6010ATI100-2N |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $14.20 | $11.50 |
| Series | FLEX 6000 | — |
| Family | SRAM-based FPGA | FLEX 6000 |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements / Gates | 880 gates (typical) | — |
| Logic Array Blocks (LABs) | 88 | 88 |
| User I/O Pins | 71 | — |
| Number of Logic Cells | 880 (per FLEX 6000 family datasheet) | — |
| パッケージ | 100-pin TQFP (14x14 mm) | TQFP-100 (Fine-line BGA-100 equivalent land pattern) |
| Speed Grade | -2 | — |
| 動作温度 | 0C to 70C (commercial) | — |
| Core Supply Voltage | 3.0 V to 3.6 V (typical 3.3 V) | 3.3 V |
| I/O Supply Voltage | 3.3 V (5 V tolerant inputs per FLEX 6000 family) | 3.3 V (5 V tolerant input) |
| Configuration Interface | JTAG (IEEE 1149.1) + serial configuration | — |
| 実装タイプ | Surface Mount | Surface Mount |
| MSLレベル | [DATA_NEEDED: moisture sensitivity level] | [DATA_NEEDED: MSL Level] |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance status] | Unknown - legacy Altera-era product |
| Process Node | [DATA_NEEDED: CMOS process node] | — |
| Total RAM Bits | [DATA_NEEDED: embedded RAM] | — |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| System Gates | — | 10,000 |
| Logic Elements / Cells | — | 880 |
| Maximum User I/O | — | 71 |
| Process Technology | — | 0.42 µm CMOS SRAM |
| Maximum Internal Frequency | — | 166.67 MHz |
| Configuration Method | — | SRAM, serial/parallel via EPC PROM or JTAG |
| 動作温度範囲 | — | -40 °C to +85 °C (Industrial) |
| Lead-Free | — | Unknown |