EPF6024AQI240-1 vs EPF6024AQC240-1 Comparaison
Comparaison détaillée côte à côte de EPF6024AQI240-1 par Altera et EPF6024AQC240-1 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPF6024AQC240-1 - FLEX 6000 FPGA, 24K Gates, 240-PQFP | Intel / Altera
EPF6024AQC240-1 ObsoleteComparaison des spécifications
| Paramètre | EPF6024AQI240-1 | EPF6024AQC240-1 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $15,20 | $18,95 |
| Family | FLEX 6000 | — |
| Typical Gates | 24,000 | 24,000 |
| Usable Gates | 19,600 | — |
| Logic Elements | [DATA_NEEDED: exact logic element count] | — |
| Dedicated Inputs | 4 | — |
| User I/O | 199 | — |
| Fréquence d'horloge maximale | 172 MHz | — |
| Technology | CMOS SRAM | — |
| Tension d'alimentation | [DATA_NEEDED: core and I/O voltage ranges] | — |
| Boîtier | 240-pin PQFP | — |
| Terminal Pitch | 0.500 mm | — |
| Type de montage | Surface Mount | Surface Mount (Gull-Wing leads) |
| Température de fonctionnement | -40C to +85C (Industrial) | 0 °C to +85 °C (commercial grade) |
| Configuration Method | Serial EPROM or microprocessor | — |
| Boundary Scan | IEEE 1149.1 JTAG | — |
| Statut RoHS | [DATA_NEEDED: confirm RoHS status] | [DATA_NEEDED: rohs status] |
| Device Family | — | FLEX 6000 |
| Logic Elements / Cells | — | 1,960 |
| Logic Array Blocks (LABs) | — | 196 |
| User I/Os | — | 199 |
| Number of I/O Banks | — | 4 |
| Maximum Internal Frequency | — | 200 MHz (typical application reference) |
| Supply Voltage (VCCINT / VCCIO) | — | 3.3 V |
| Process Technology | — | 0.42 µm CMOS, 4 metal layers, SRAM-based |
| Package Type | — | 240-pin PQFP (240-BFQFP), 32 × 32 mm body, 0.5 mm pitch |
| Configuration Memory | — | SRAM (volatile, requires external configuration device) |
| Boundary Scan / JTAG | — | IEEE 1149.1 compliant |