EPF8820ATC144-10 vs EPF8820ATC144-1 Comparaison
Comparaison détaillée côte à côte de EPF8820ATC144-10 par Altera et EPF8820ATC144-1 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPF8820ATC144-10 - 672-Cell FLEX 8000 FPGA, 144-LQFP, 10ns | Altera
EPF8820ATC144-10 ObsoleteAltera
EPF8820ATC144-1 - FLEX 8000 FPGA, 672 Cells, 112 I/O, 144-TQFP | Altera
EPF8820ATC144-1 ObsoleteComparaison des spécifications
| Paramètre | EPF8820ATC144-10 | EPF8820ATC144-1 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $10,40 | $15,95 |
| Family | FLEX 8000 | FLEX 8000 |
| Usable Gates | approximately 8,000 | — |
| Logic Cells / Elements | 672 | — |
| Number of LABs/CLBs | 84 | — |
| Number of User I/Os | 112 | — |
| Total RAM Bits | [DATA_NEEDED: RAM bits per datasheet] | — |
| Propagation Delay (Speed Grade) | 10 ns (speed grade -10) | — |
| Process Technology | 0.42 µm CMOS | CMOS SRAM |
| Supply Voltage (Core) | 5 V | — |
| I/O Voltage (MultiVolt) | 3.3 V or 5.0 V | — |
| Configuration Memory | CMOS SRAM | — |
| Boîtier | 144-pin LQFP (TQFP) 0.5 mm pitch | 144-pin TQFP |
| Configuration Devices Supported | EPC1, EPC1213, EPC1064, EPC1441 | — |
| Température de fonctionnement | 0 °C to 70 °C (commercial) | 0C to 70C (commercial) |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Niveau MSL | [DATA_NEEDED: MSL rating] | — |
| Type de montage | Surface Mount | — |
| Device | — | EPF8820A |
| Logic Cells | — | 672 |
| Logic Array Blocks (LABs) | — | 84 |
| User I/Os | — | 112 |
| Equivalent Gates | — | ~8,000 usable gates |
| Flip-Flops (max) | — | 1,500 |
| Tension d'alimentation | — | 5.0 V (MultiVolt I/O supports 3.3 V or 5.0 V) |
| Speed Grade | — | -1 (slowest) |
| Configuration Method | — | SRAM, loaded via EPC1 / EPC1064 / EPC1213 / EPC1441 or parallel EPROM |
| In-Circuit Reconfigurability | — | Yes (ICR) |
| JTAG Boundary Scan | — | Yes (IEEE 1149.1) |