EPM240GF100I5N vs EPM240M100C4N Comparaison
Comparaison détaillée côte à côte de EPM240GF100I5N par Altera et EPM240M100C4N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM240GF100I5N | EPM240M100C4N |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $7,90 | $7,45 |
| Series | MAX II | MAX II |
| Logic Elements / Blocks | 240 LE | — |
| Number of Macrocells | 192 | — |
| Maximum User I/O | 80 | — |
| Propagation Delay (tpd, max) | 4.7 ns | — |
| Programmable Type | In-System Programmable (ISP) | — |
| Non-Volatile Memory | On-chip flash configuration | — |
| Internal Supply Voltage | 1.71 V to 1.89 V (regulated on-chip) | — |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| Boîtier | 100-ball FBGA (FineLine BGA), 11 mm x 11 mm, 1.0 mm pitch | 100-pin Micro FineLine BGA (MBGA), 6 x 6 mm, 0.5 mm pitch |
| Operating Temperature (TJ) | -40 C to +100 C | — |
| Type de montage | Surface Mount | Surface Mount (BGA) |
| JTAG Support | IEEE 1149.1 / IEEE 1532 compliant | — |
| Lead-Free / RoHS | Yes (lead-free, RoHS compliant) | — |
| Logic Family | CMOS | CMOS |
| Vertical Migration Family | EPM240 / EPM570 / EPM1270 / EPM2210 in same-package footprint | — |
| Device Family | — | EPM240 |
| Macro Cells | — | 192 |
| User I/Os | — | 80 |
| Propagation Delay (tPD) Max | — | 4.7 ns |
| Internal Operating Frequency | — | 247.5 MHz |
| Supply Voltage - Core | — | 2.5 V / 3.3 V |
| I/O Standards Supported | — | 1.5 V, 1.8 V, 2.5 V, 3.3 V LVCMOS/LVTTL |
| User Flash Memory | — | 8 Kbit |
| Programmability | — | In-System Programmable via JTAG (IEEE 1149.1) |
| Configuration Memory | — | Non-volatile on-chip flash (instant-on) |
| Température de fonctionnement | — | -40 C to +125 C (industrial) |
| Statut RoHS | — | Lead Free (per DigiChip spec sheet) |
| Logic Array Blocks (LABs) | — | 4 (16 macrocells per LAB) |
| MultiTrack Interconnect | — | Yes |
| Hot Socketing | — | Yes |