EPM240M100C4N vs EPM240M100I5N Comparaison
Comparaison détaillée côte à côte de EPM240M100C4N par Intel et EPM240M100I5N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM240M100C4N | EPM240M100I5N |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $7,45 | $7,95 |
| Series | MAX II | MAX II |
| Device Family | EPM240 | — |
| Macro Cells | 192 | 192 |
| User I/Os | 80 | — |
| Propagation Delay (tPD) Max | 4.7 ns | — |
| Internal Operating Frequency | 247.5 MHz | — |
| Supply Voltage - Core | 2.5 V / 3.3 V | — |
| I/O Standards Supported | 1.5 V, 1.8 V, 2.5 V, 3.3 V LVCMOS/LVTTL | — |
| User Flash Memory | 8 Kbit | — |
| Programmability | In-System Programmable via JTAG (IEEE 1149.1) | — |
| Configuration Memory | Non-volatile on-chip flash (instant-on) | — |
| Logic Family | CMOS | — |
| Boîtier | 100-pin Micro FineLine BGA (MBGA), 6 x 6 mm, 0.5 mm pitch | 100-MBGA (Micro FineLine BGA) |
| Type de montage | Surface Mount (BGA) | Surface Mount (BGA) |
| Température de fonctionnement | -40 C to +125 C (industrial) | -40 °C to +100 °C (industrial) |
| Statut RoHS | Lead Free (per DigiChip spec sheet) | Compliant |
| Logic Array Blocks (LABs) | 4 (16 macrocells per LAB) | — |
| MultiTrack Interconnect | Yes | — |
| Hot Socketing | Yes | — |
| Family | — | MAX II CPLD |
| Logic Elements | — | 240 |
| Maximum Internal Frequency | — | 201.1 MHz |
| Propagation Delay (tPD) | — | 4.7 ns |
| On-die Non-volatile Memory | — | 8 Kbits |
| Process Technology | — | 0.18 µm, 6-layer metal flash |
| Core Voltage | — | 2.5 V / 3.3 V |
| I/O Bank Voltages | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| User I/O Pins | — | [DATA_NEEDED: user IO count for MBGA package] |
| Programming Interface | — | JTAG (IEEE 1149.1) |
| Lead-Free | — | Yes |