EPM3032ATC44-10NAB vs EPM3032ATC44-10 Comparaison
Comparaison détaillée côte à côte de EPM3032ATC44-10NAB par Intel et EPM3032ATC44-10 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EPM3032ATC44-10NAB - 32-Macrocell CPLD, 10ns, 3.3V | Intel (Altera)
EPM3032ATC44-10NAB ObsoleteComparaison des spécifications
| Paramètre | EPM3032ATC44-10NAB | EPM3032ATC44-10 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $4,10 | $0,78 |
| Product Family | MAX 3000A | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Logic Elements / Macrocells | 32 macrocells | — |
| Usable Gates | 600 | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Maximum Operating Frequency | 103.1 MHz (per Arrow listing) | — |
| Number of User I/O | 34 (max for 44-pin TQFP package) | — |
| Core Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V (MultiVolt I/O compatible with 5.0 V, 3.3 V, 2.5 V logic) | — |
| Boîtier | 44-pin TQFP | 44-pin TQFP (10x10 mm) |
| Type de montage | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE Std. 1149.1 / IEEE Std. 1532 ISP) | — |
| Configuration Memory | Non-volatile EEPROM | — |
| Hot-Socketing Support | Yes | — |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | 0 °C to +70 °C (commercial, 'C' grade) |
| Statut RoHS | Compliant (per -NAB suffix convention) | Compliant |
| Delivery Form | Tray ('AB' suffix per Altera order code convention) | — |
| Process Technology | CMOS, EEPROM-based | — |
| Series | — | MAX 3000A |
| Family | — | CPLD MAX 3000A |
| Number of Macrocells | — | 32 |
| Number of Logic Array Blocks (LABs) | — | 2 |
| Number of Usable Gates | — | 600 |
| Number of I/O Pins | — | 34 |
| Propagation Delay (tPD) | — | 10 ns |
| Maximum Internal Frequency | — | 227.3 MHz |
| Supply Voltage (VCCINT) | — | 3.0 V to 3.6 V (3.3 V typical) |
| I/O Voltage Tolerance | — | MultiVolt (1.8 V / 2.5 V / 3.3 V / 5.0 V) |
| Technology | — | CMOS EEPROM |
| In-System Programming | — | Yes (IEEE 1149.1 JTAG) |
| Niveau MSL | — | [DATA_NEEDED: MSL Level] |
| Lead-Free | — | Yes |