EPM3256AQC208-10N vs EPM3512AQ208-10N Comparaison
Comparaison détaillée côte à côte de EPM3256AQC208-10N par Altera et EPM3512AQ208-10N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM3256AQC208-10N | EPM3512AQ208-10N |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $4,62 | $21,40 |
| Series | MAX 3000A | — |
| Programmable Type | In-System Programmable (EEPROM) | — |
| Number of Macrocells | 256 | — |
| Number of Logic Elements/Blocks | 16 LABs | — |
| Usable Gates | 10,000 | 10,000 |
| Number of I/O Pins | 161 (158 user I/O per Arrow listing) | — |
| Propagation Delay (tpd) | 10 ns (max) | — |
| Maximum Counter Frequency | 227.3 MHz | — |
| Supply Voltage - Internal | 3.0 V to 3.6 V (3.3 V typical) | — |
| Température de fonctionnement | 0C to +70C (Commercial) | — |
| Boîtier / Format | 208-BFQFP / 208-PQFP (28x28 mm) | — |
| Type de montage | Surface Mount | Surface Mount |
| ISP Compliance | IEEE Std. 1532 | — |
| Boundary Scan | IEEE Std. 1149.1 (JTAG) | — |
| I/O Tolerance | 5 V tolerant, MultiVolt interface | — |
| Statut RoHS | [DATA_NEEDED: lead-free status - non-RoHS suffix 'N' typically indicates lead-free finish, but datasheet not present in data] | unknown |
| Family | — | MAX 3000A |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 512 |
| User I/Os | — | 172 |
| Logic Array Blocks (LABs) | — | 32 |
| Boîtier | — | 208-pin PQFP |
| Speed Grade | — | -10 (10 ns pin-to-pin delay) |
| Pin-to-Pin Delay (tPD) | — | 4.5 ns (typical) |
| Maximum Frequency (fCNT) | — | 227.3 MHz |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 2.5 V, 3.3 V, or 5.0 V |
| Process Technology | — | CMOS EEPROM |
| Programming Interface | — | IEEE Std. 1532 (JTAG) ISP |
| Operating Temperature (Industrial) | — | -40 C to +85 C |