EPM3256AQC208-10N vs EPM3512AQC208-10N Comparaison
Comparaison détaillée côte à côte de EPM3256AQC208-10N par Altera et EPM3512AQC208-10N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM3256AQC208-10N | EPM3512AQC208-10N |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $4,62 | $42,80 |
| Series | MAX 3000A | — |
| Programmable Type | In-System Programmable (EEPROM) | — |
| Number of Macrocells | 256 | — |
| Number of Logic Elements/Blocks | 16 LABs | — |
| Usable Gates | 10,000 | Up to 10,000 |
| Number of I/O Pins | 161 (158 user I/O per Arrow listing) | — |
| Propagation Delay (tpd) | 10 ns (max) | — |
| Maximum Counter Frequency | 227.3 MHz | — |
| Supply Voltage - Internal | 3.0 V to 3.6 V (3.3 V typical) | — |
| Température de fonctionnement | 0C to +70C (Commercial) | 0 C to 70 C (commercial) |
| Boîtier / Format | 208-BFQFP / 208-PQFP (28x28 mm) | — |
| Type de montage | Surface Mount | — |
| ISP Compliance | IEEE Std. 1532 | — |
| Boundary Scan | IEEE Std. 1149.1 (JTAG) | — |
| I/O Tolerance | 5 V tolerant, MultiVolt interface | — |
| Statut RoHS | [DATA_NEEDED: lead-free status - non-RoHS suffix 'N' typically indicates lead-free finish, but datasheet not present in data] | [DATA_NEEDED: RoHS status not in verified web data] |
| Family | — | MAX 3000A |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 512 |
| Logic Array Blocks (LABs) | — | 16 |
| User I/Os | — | 172 |
| Boîtier | — | 208-pin PQFP (Plastic Quad Flat Pack) |
| Tension d'alimentation | — | 3.3 V |
| Pin-to-Pin Delay | — | 4.5 ns (-10 speed grade) |
| Maximum Internal Frequency | — | 227.3 MHz |
| Speed Grade | — | -10 |
| Process Technology | — | CMOS EEPROM |
| In-System Programming | — | IEEE Std. 1149.1 JTAG, IEEE Std. 1532 |
| Boundary-Scan Test (BST) | — | Built-in, IEEE 1149.1 compliant |
| I/O Standards | — | MultiVolt (1.8V / 2.5V / 3.3V) |