EPM3512AQC208-15N vs EPM3512AQC208-3 Comparaison
Comparaison détaillée côte à côte de EPM3512AQC208-15N par Altera et EPM3512AQC208-3 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPM3512AQC208-15N - 512-Macro CPLD MAX 3000A PQFP-208 | Altera
EPM3512AQC208-15N ⚠ Dernier achatAltera
EPM3512AQC208-3 - MAX 3000A CPLD, 512 Macrocells, 172 I/O, PQFP-208 | Altera
EPM3512AQC208-3 ⚠ Dernier achatComparaison des spécifications
| Paramètre | EPM3512AQC208-15N | EPM3512AQC208-3 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $20,50 | $27,80 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD - Complex Programmable Logic Device | CPLD (Complex Programmable Logic Device) |
| Macro Cells | 512 | — |
| Logic Array Blocks (LABs) | 16 | 16 (32 macrocells each) |
| Maximum User I/O Pins | 172 | 172 |
| Typical Usable Gates | 12,000 | — |
| Number of Logic Elements | 512 | — |
| Pin-to-Pin Delay (tPD) | 15 ns | — |
| Operating Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 2.5 V / 3.3 V (MultiVolt) | — |
| Programmable I/O Standards | LVTTL, LVCMOS, PCI (with external resistor) | — |
| In-System Programmability | Yes (IEEE Std. 1532 compliant) | Yes (IEEE Std. 1532 compliant) |
| Configuration Memory | EEPROM (non-volatile) | — |
| JTAG Support | Yes (BST/Boundary-Scan Test) | — |
| Boîtier | PQFP-208 (QC208) | PQFP-208 |
| Type de montage | Surface Mount | Surface Mount |
| Température de fonctionnement | 0C to +70C (commercial) | [DATA_NEEDED: industrial/commercial grade range] |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: confirm from datasheet] |
| Macrocells | — | 512 |
| Speed Grade | — | -3 |
| Supply Voltage - Core (VCCINT) | — | 3.3 V |
| I/O Bank Supply Voltage (VCCIO) | — | 2.5 V / 3.3 V / 5.0 V (multiVolt) |
| Boundary-Scan Test | — | Yes (IEEE Std. 1149.1 / JTAG) |
| Program/Erase Cycles | — | 100 minimum [DATA_NEEDED: exact datasheet figure] |
| Non-Volatile Configuration | — | Yes (EEPROM-based) |
| Niveau MSL | — | [DATA_NEEDED: moisture sensitivity level] |