EPM5016DC-20 vs EPM5032DC-20 Comparaison
Comparaison détaillée côte à côte de EPM5016DC-20 par Altera et EPM5032DC-20 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5016DC-20 | EPM5032DC-20 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $16,50 | $5,05 |
| Family | MAX 5000 | — |
| Device Type | EPLD (UV-Erasable Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 16 | 32 |
| Product Terms | 160 | — |
| Dedicated Inputs | 7 | — |
| I/O Pins | 8 | [DATA_NEEDED: I/O pin count for DIP-20 variant] |
| Propagation Delay (tPD) | 20 ns | — |
| Fréquence d'horloge maximale | 62.5 MHz | — |
| Maximum Supply Voltage | 5.25 V | — |
| Nominal Supply Voltage | 5.0 V | — |
| Process Technology | CMOS, UV-erasable | — |
| Architecture | PAL-type macrocell with Programmable Interconnect Array (PIA) | — |
| Package Type | 20-pin Ceramic DIP (Cerdip) with UV window | — |
| Package Suffix Code | DC = Ceramic DIP, Commercial | — |
| Speed Grade | -20 = 20 ns tPD | -20 |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: commercial/industrial/military grade] |
| Programming Method | UV erase + EPROM-style programming via Altera programming hardware | Altera MAX+PLUS II / Quartus (legacy support) |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | Compliant (per IC-Components listing) |
| Product Family | — | MAX 5000 |
| Programmable Technology | — | UV-Erasable / OTP EPROM |
| Usable Gates | — | 600 |
| Maximum Frequency (fCNT) | — | 71.4 MHz |
| Pin-to-Pin Delay (tPD) | — | 20 ns |
| Supply Voltage (VCC) | — | 5 V |
| Boîtier | — | 20-pin DIP (Windowed Ceramic, 0.3" wide) |
| Type de montage | — | Through-Hole |
| Logic Blocks | — | 4 Logic Array Blocks (LABs) |
| Lead Free | — | [DATA_NEEDED: confirmed lead-free] |
| Manufacturer | — | Altera (now Intel Programmable Solutions Group) |