EPM5032DI25 vs EPM5016DC-20 Comparaison
Comparaison détaillée côte à côte de EPM5032DI25 par Altera et EPM5016DC-20 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5032DI25 | EPM5016DC-20 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $11,10 | $16,50 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | UV-erasable EPLD (CMOS EPROM-based) | EPLD (UV-Erasable Programmable Logic Device) |
| Macrocells | 32 | 16 |
| Logic Array Blocks (LABs) | 2 | — |
| Product Terms | 320 | 160 |
| Output Macrocells | 16 | — |
| Bidirectional I/O Pins | 16 | — |
| Dedicated Inputs | 7 | 7 |
| Total Inputs | 24 | — |
| Pin-to-Pin Delay (tPD) | 25 ns | — |
| Maximum Clock Frequency (fMAX) | 62.5 MHz | — |
| Supply Voltage (VCC) | 5 V (single supply) | — |
| I/O Standard | TTL-compatible | — |
| Boîtier | 24-pin Ceramic DIP (DI) with quartz window | — |
| Programming Technology | UV-EPROM (erasable via quartz window) | — |
| I/O Pins | — | 8 |
| Propagation Delay (tPD) | — | 20 ns |
| Fréquence d'horloge maximale | — | 62.5 MHz |
| Maximum Supply Voltage | — | 5.25 V |
| Nominal Supply Voltage | — | 5.0 V |
| Process Technology | — | CMOS, UV-erasable |
| Architecture | — | PAL-type macrocell with Programmable Interconnect Array (PIA) |
| Package Type | — | 20-pin Ceramic DIP (Cerdip) with UV window |
| Package Suffix Code | — | DC = Ceramic DIP, Commercial |
| Speed Grade | — | -20 = 20 ns tPD |
| Température de fonctionnement | — | [DATA_NEEDED: operating temperature range] |
| Programming Method | — | UV erase + EPROM-style programming via Altera programming hardware |
| Statut RoHS | — | [DATA_NEEDED: RoHS compliance] |